Panasonic NV-VP60GC, Руководство по обслуживанию

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53 5V (OSD) - OSD circuit Power supply Terminal - - -
54 HLF I Slicer LPF Connection Terminal In In In
55 V HOLD I Capacitor Connection terminal of Slicer Ref Voltage Generator Circuit In In In
56 CV IN (EDS) I Slicer Composite Video Signal Input Terminal. In In In
57 GND - Testing terminal A. ( Connected to GND ) - - -
58 NC Unused terminal Low Low Low
59 SECAM MIX O SECAM CHROMA signal input terminal for SECAM SIGNAL SUPER IMPOSE. Low Low Low
60 NC O Unused terminal Low Low Low
61 SW2 O
AUDIO SYSTEM (TUNER PRESET) select terminal.
AUDIO SYSTEM = BG, DK: High is Output.
AUDIO SYSTEM = I, M: Low is Output.
Low Low Low
62 A.SEARCH (L) I/O
AGC gain selection signal for tuner CH selection.
During digital AFC is working at TUNER PRESET mode: Low (AGC is high speed)
Other than above: Hi-Z (AGC is normal speed)
Low Low Low
63 VBI2 O Unused terminal Hi-Z Low Hi-Z
64 VBI1 O Unused terminal Hi-Z Low Hi-Z
65 EEPROM OUT O
Used during Navi back-up mode
EEPROM control terminal: data output
Low Low Low
66 EEPROM IN I
Used during Navi back-up mode
EEPROM control terminal: data input
In In In
67 EEPROM CLK O
Used during Navi back-up mode
EEPROM control terminal: clock output
Low Low Low
68 IC DATA OUT O Peripheral IC control Timer-Bus signal: data output
(Normal
Opera-
tion)
Low Hi-Z
69 IC DATA IN I Peripheral IC control Timer-Bus signal: data input
(Normal
Opera-
tion)
In In
70 IC DATA CLK O Peripheral IC control Timer-Bus signal: clock output
(Normal
Opera-
tion)
Low Hi-Z
71 IIC CLK O AV1 Chip/FM Audio IC serial communication terminal(IIC).
(Normal
Opera-
tion)
Low Hi-Z
72 IIC DATA I/O AV1 Chip/FM Audio IC serial communication terminal(IIC).
(Normal
Opera-
tion)
Low Hi-Z
73 125Hz/ROM CORE O
Since there are 2 function controls,port function is divided into 2 as shown below.
(1) Normal mode/Service mode : Fixed Output(NC) = L
(2) Test mode: Judge ROM core confirmation. Decide port function.
When ROM core confirm mode: ROM.CORE terminal
When other than ROM core confirm mode: Main clock Adjustment Internal
Osc. Output terminal
(3) Test 2 mode:Main clock Adjustment Internal Osc. Output terminal
Control method of each port function is shown as below.
[ROM .CORE terminal]When ROM collection setting bit = ON, Output = High
When ROM collection setting bit = OFF, Output = Low
[Main clock Adjuatment Internal Osc. Output terminal ]
Output : 125Hz
(Normal
Opera-
tion)
Low Low
74 CAP R/F O
Capstan driver rotating direction control
RVS = "High", FWD = "Low"
Low Low Low
75 POWER ON (H) O
VTR power control terminal.
When VTR = Power Off, and, DVD = Power Off, Ouput = Low
When VTR peripheral circuit = Power Off/ Timer Standby, Output = Low
Even when apparently Power is Off, if Mecha or Peripheral circuit operation is
required, output = High
If required: Head cleaning, timer confirmation ( VPS/PDC standby, ACS )
When J.CLK Syscon serial is ON( during J.CLK mode ), even if power is off = High
Low Low High
52
NV-VP60GL / NV-VP60GC / NV-VP60GCS