Panasonic KX-HCM280, Руководство по обслуживанию

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by FV_DSP, EP1_DSP and EP2_DSP. The lens control is performed
by signals including PWM connected to the lens board via CN904.
14.2.2.2. Video Signal Process Block
- CDS (IC801)
Power-supply voltages: 3.3V
Package: 36pin QFP
Performs CDS (Correlate Double Sampling) process for CCD
output signal from CCD board, AGC (Auto Gain Control) process
and A/D conversion (10bit)
CCD output signal is sampled with SP1 and SP2 signal to reduce
noise in CDS circuit. Then, after being adjusted to the specified
level in accordance with the serial signal (CS_CDS, SDI_DSP,
SDCLK_DSP) instruction from CAMERA CPU (IC902) in GCA
circuit, it is converted to 10bit, the digital signal with the sampling
frequency: 14,31818 MHz of ADCLK input signal by A/D converter.
This output signal is adjusted in order that OB (Optical Black) on
CCD output signal shall be standard level by OBP signal.
- VIDEO DSP (IC803)
Power-supply voltages: +3.3V
Package: 120pin QFP
Clock frequency: 28.636MHz (X801)
Processes CDS IC (IC801) output signal and outputs Y signal and
C signal. Outputs CCD drive signal.
Writing each setting to this IC and reading of data is performed by
the serial signal (CS_CDS, SDI_DSP, SDCLK_DSP, SDO_DSP,
SLD_DSP) in CAMERA CPU.
<Video signal process>
The signal input from CDS IC (IC801) is composed of luminance signal process and color signal
process.
- Luminance signal process
1. Horizontal/Vertical edge enhance
2. Gamma correction for grey-level
3. Adjusts level correctly
4. D/A converts for output
- Color signal process
1. RGB matrix to convert to RGB signal
2. White Balance by CAMERA CPU instruction
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