38
8.3.
Digital (Back End Section) Block Diagram(1/2)
1
3
4
6
7
9
10
12
16
15
2
VIDEO
AUDIO
TC-
PRMY0-11_B
1
TC-
PRMCR0-11_B
3
TC-
PRMCB0-11_B
4
TC-
G_HD2_D0-3_B
L55001
L55002
AUDIO SIGNAL
VIDEO SIGNAL
JK55001
HDMI JACK
D2+
D2-
D1+
D1-
D0+
CLK+
D0-
CLK-
HDMISDA
HDMISCL
19
HOTPLG
SCL3
SDA3
AO1IEC
VO1HDCK
VO1HSYNC
VO1VSYNC
PRMVSYNC
PRMVSYNC
PRMHSYNC
PRMHSYNC
PRMCLK
PRMCLK
PRM_OE
PRM_OE
PRMVSYNC
PRMHSYNC
PRMCLK
PRM_OE
AO1LRCK
AO1BCK
AO1DACCK
XHD_RST
INTHD
AH34 CK33XI
AJ33 CK33XO
C34 SDCLK
AA1 C0CK
AA2 C0XCK
C0CK
C0XCK
D34 SDDAT3
E33 SDDAT2
B34 SDDAT1
C33 SDDAT0
X51002
(33MHz)
W34 CK24I
W33 CK24O
X51001
(24MHz)
P51604
SD CARD SLOT
DAT0
G_SDDAT0_C
G_SDDAT1_C
G_SDDAT2_C
G_SDDAT3_C
G_SDCLK_C
DAT1
DAT2
DAT3
CLK
7
8
9
1
5
IC51301
(8bit NAND)
IC52002
IC52001
DDR SDRAM
1Gbit
DDR SDRAM
1Gbit
64M X 8bit NAND
FLASH MEMORY
15
TC-
BUS_ED0-7_B
9
TC-
C0DQ0-15,C0A0-13
10
TC-
C0DQ16-31,C0A0-13
11
TC-
C1DQ0-7,C1A0-13
12
TC-
C1DQ8-15,C1A0-13
13
TC-
C1DQ16-23,C1A0-13
14
TC-
C1DQ24-31,C1A0-13
DDR_CH0_I/F
HOST I/F
IC52202
IC52201
DDR SDRAM
1Gbit
DDR SDRAM
1Gbit
DDR_CH1_I/F
IC52204
IC52203
DDR SDRAM
1Gbit
DDR SDRAM
1Gbit
IC51001
(PEAKS-PRO2)
SD_IF
DIGITAL BLOCK DIAGRAM
(BACK END SECTION(1/2))
DMP-BDT300GA/GC/GN/PU
1
1
IC55001
(HDMI TRANSMITTER)
(AV-AMP)
Video
I/F
Audio
I/F
Color
Space
Converter
Repetition
Deepcolor
Controller
TX2P
TX2M
TX1P
TX1M
TX0P
TX0M
TXCP
TXCM
25
23
21
19
17
15
13
11
119
1
120
118
SDA
SCL
HPD
Configuration
Register
Authentication
Key Exchange
DDC
I/F
Clock
Gen1
I2C
I/F
1
113
112
116
1
115
HSCL
NIRQ
HSDA
AMDAM
NRESET
41
PCLKIN
AMDACL
39
AMDWS
36
AMRX
35
HSYNC
84
89
VSYNC
83
HCLK
96
HDCP
Cipher/
Encrytor
TMDS
Encoder
TMDS
Transmitter
AV
Controller
121
DE
1
3
4
6
7
9
10
12
16
15
6
TC-
PRMY0-11_C
5
TC-
PRMCR0-11_C
7
TC-
PRMCB0-11_C
8
TC-
G_HD2_D0-3_C
L55301
L55302
JK55301
HDMI JACK
D2+
D2-
D1+
D1-
D0+
CLK+
D0-
CLK-
HDMISDA
HDMISCL
13
CEC
19
HOTPLG
1
1
IC55301
(HDMI TRANSMITTER)
(3D-TV)
Video
I/F
Audio
I/F
Color
Space
Converter
Repetition
Deepcolor
Controller
TX2P
TX2M
TX1P
TX1M
TX0P
TX0M
TXCP
TXCM
25
23
21
19
17
15
13
11
119
1
120
118
SDA
SCL
HPD
Configuration
Register
Authentication
Key Exchange
DDC
I/F
Clock
Gen1
I2C
I/F
1
113
112
116
HSCL
NIRQ
HSDA
AMDAM
41
PCLKIN
AMDACL
39
AMDWS
36
AMRX
35
HSYNC
84
89
VSYNC
83
HCLK
96
HDCP
Cipher/
Encrytor
TMDS
Encoder
TMDS
Transmitter
AV
Controller
121
D3
D2
G1
DE E1
A8
C8
E7
A7
K5
B6
C7
H3
J7
K7
J7
K7
HOT_PLUG E6
DE
HD2_IEC
HD2_LRCK
HD2_BCK
HD2_MCK
G_SCL3_BE
G_SDA3_B
G_SCL3_BE
G_SDA3_B
G_SCL3_BE
G_SDA3_B
HD2_IEC
HD2_LRCK
HD2_BCK
HD2_MCK
HD2_IEC
HD2_LRCK
HD2_BCK
HD2_MCK
EN3D
1
115 NRESET
K1
CK
/CK
CK
/CK
AN14 C1CK
AP13 C1XCK
C1CK
C1XCK
C1CK
C1XCK
C1CK
C1XCK
F7
G7
F7
G7
CK
/CK
CK
/CK
F7
G7
CK
/CK
F7
G7
CK
/CK
FROM TIMER
BLOCK SECTION
1
2
Содержание DMP-BDT300GA
Страница 2: ...2 ...
Страница 6: ...6 1 3 Caution for AC cord only for BDT300GC ...
Страница 27: ...27 7 2 3 How to Clean the Lens of Optical Pick UP Follow the 9 2 1 Upper Base Ass y of VOL 1 CHM1005029CE ...
Страница 28: ...28 7 3 Adjustment of BD Drive 7 3 1 Repair Flowchart ...
Страница 29: ...29 7 3 2 Distinction Analysis 7 3 2 1 Distinction Analysis Flowchart ...