5S-P-003
Program Writer
© Copyright 2022, PADAUK Technology Co. Ltd
Page 32 of 34
5S-P-003-UM-EN-V007
– Oct. 14, 2022
9. Appendix Descriptions
9.1 The difference between
5S-P-003 and 3S-P-002
Project
5S-P-003
3S-P-002
Notes
All pin do O/S test
support
nonsupport
Writing time
acceleration
note1
PDK loading time
acceleration
note1
Jumper naming
JPx
CNxx
note2
LCM prompts jumper / IC position
support
nonsupport
Phase out IC
(
ex: P232/P234
)
nonsupport
support
Note 1: IC acceleration ratio is related to IC type.
Note 2: Please refer to the relevant table to learn about the connection between Jumper(JPx)and
IC type/package.
9.2 The difference between 5S-P-003 and 5S-P-003Bx
(1) Enhance the power input range
(2) Improvement of antistatic interference capability
(3) When writing some chips, the PA5 and VDD of the writer Jump need to be exchanged (
swap
).
9.2 Special notes of MTP On-board writing
MTP series enable to support On-board writing.
Take PFS154 as an example (please refer to PFS154 data sheet to learn about other MTP chip writing wire)
There are five wires of on-board writing, one clock wire ICPCK and one data wire ICPDA, and three other power
wires are VDD, GND and writing voltage VPP. In the follow wiring table of on-board writing, the
☆
of wiring
table may be resistor or capacitor, and the conditions of wiring circuit as follows:
PIN
Resistance
Capacitance
V
DD
/ GND
---
Capacitance must be less than or
equal to 0.1 UF
PA3 / PA5 / PA6
Resistance must bigger than or
equal to 10
KΩ
Capacitance must be less than or
equal to 220pF
At the same time, set O/S test to writing pin particularly according to section 5.5.