Figure
1
A-6
MA950
NET
VELOCITY
COMMAND
(RAD/SEC)
ANTI-
RESONANCE
SECOND ORDER
FILTER
K (s)
V
POSITION
RESOLVER
INTERFACE
VELOCITY
CLAMP
(AMP)
KVP
1,2
0
BlkType
ARF0
ARF1
ARZ0
ARZ1
(RAD/SEC)
TO
POSITION
LOOP
(RAD)
EncFreq
(1 mSec Ts)
2
0,1
RemoteFB
0
MOTOR
CURRENT
(AMP)
sJ
tot
MECHANICS
K
teff
3 PHASE
DE-ROTATED
TORQUE AND
TORQUE QUAD
LOOPS
CW
ILmtPlus
ILmtMinus
DIG
INT
KVI
INTEGRATOR
RESET
STOP
INTEGRATOR
KIP KII
CW
EncPos
TORQUE
CURRENT
DEROTATE
W
eIn
1
2
3
4
5
6
7
8
9
10
12
13
0
ANALOG.OUT
11
VelFb
VelCmdA
VelErr
FVelErr
Position
PosError
PosCommand
ICmd
IFB
AnalogIN
EncFreq
EncPos
ItFilt
DAC
MONITOR
CH X
SELECTION
AND
UNITS
CONVERSION
14
HsTemp
28
VelCmd
LOW
PASS
FILTER
CLAMP
DMxF0
CLAMP ON
DAC
MONITOR x
OUTPUT
8 BIT
DAC
DMxOut
(+/- 5 V)
DMxGAIN
DMxMap
*
*
IDEALIZED MECHANICS. ACTUAL
SYSTEMS OFTEN MORE INVOLVED.
1,2
(AMP)
4
FVelErr
(RPM)
(RPM)
(RPM)
VelErr
VelFB
3
1
4
Position
(Resolver
Counts)
8
ICmd
(AMP)
(AMP)
9
IFB
(AMP)
SC950 VELOCITY CONTROL
BLOCK DIAGRAM