One Stop Systems
OSS-PCIe-HIB35x4 | 9
1.4
PCIe Card Edge x4
The PCIe Card edge will be directly routed x4 interface to the PLX Chip
In host mode, the add-in card will accept a clock as an input.
In target mode, the add-in card will drive a clock. It will also provide a reset output and a PS_ON# signal.
1.5 Power
Power is provided by the PCI-e card slot.
Power required by internal components of
OSS-PCIe-HIB-35-x4
is estimated to be 4 watts when both ports are fully linked and
operating in Gen2 mode.
Cable power is to be provided per PCIe cable specification. When an active cable (powered transceiver) is used, additional power is
required from the PCI-e card slot.
Power will be su3.3V, +3.3Vaux through Card Edge.
Some power rails will be derived from the onboard circuitry.
1.6
PCIe Cable Sideband signals
All Cable sideband signals CPERST#, CPWRON, CPRSNT#, CWAKE# to be connected per the PCIe Cable specification.
Additional isolation of signal CE_PWRON# (card edge power control) shall be provided by a physical switch.
This switch allows user to electrically isolate this signal from the card edge connector.
*The target card and expansion unit are powered UP instantly upon turning ON the host computer.
1.7
PLX PEX8609
Supports Non Transparent Bridging
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The “Non-Transparent Bridging” (NTB) function enables isolation of two hosts or memory domains yet allows status and
data exchange between the two hosts or sub-systems
Integrated DMA Engine (with four DMA channels and internal buffer space)
8 Lane / 8 port PCIe Switch
PCIe Gen2 (5.0 GT/s)
Spread Spectrum Clock Isolation
