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NCP1219PRINTGEVB

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The output voltage ripple is measured at 16 mV at high

line and full load. It is significantly less than the 50 mV
target. The output voltage ripple waveform at high line and
full load is shown in Figure 37. The ripple measured at the

switching frequency appears as expected. The output filter
eliminates the ripple associated with the switching
frequency, leaving only low amplitude spikes of noise that
are due to the switch transitions.

Figure 37. Output Voltage Ripple at High

line and Full Load

If the output ripple is observed on a longer time scale, a

component of the NCP1219 frequency jitter is observed.
The frequency jitter generated by the controller spreads the
energy generated during switching, reducing

electromagnetic interference, EMI. The bandwidth of the
system is not high enough to prevent this component. This
is shown in Figure 38. The output ripple due to the frequency
jitter is still within the target limits.

Figure 38. Frequency Jitter Component of Output Ripple at Nominal Load Current

Содержание NCP1219PRINTGEVB

Страница 1: ...W output with transient capability of 48 W as defined in Figure 1 Figure 1 Transient Output Current Specification time ms Output Current A 0 92 A 2 0 A 1 25 A 700 ms 300 ms The system has a low voltag...

Страница 2: ...10 R15 10 Q3 open R20 open R30 open R1 4 75M R2 4 75M MMSD914T1G C18 open C14 470pF 250V R18 100 D12 MUR420RLG R33 8 06k Q6 2N7002L R34 1k R35 10K C1 0 22mF 275V 1 2 HS1 ZD2 open Q5 SPA07N65C3 SGND JP...

Страница 3: ...CCM the secondary RMS current is minimized reducing the requirements on the transformer and output capacitor For the evaluation board design with a transition occurring at Iout 1 6 A the primary induc...

Страница 4: ...ating factor of 0 8 to PIV the minimum breakdown voltage of D12 must be greater than 173 V An MUR420 200 V ultrafast rectifier is selected The power dissipated in the secondary diode Pd is approximate...

Страница 5: ...ircuitry to prevent the converter from entering DSS mode during the standby conditions Figure 3 shows this configuration The voltage is supplied by the auxiliary winding through a series diode Figure...

Страница 6: ...the startup circuit is charging CCC The increased bulk voltage is given by Equation 23 Vbulk PDSS ICC3 Istart Rbulk eq 23 where PDSS is found by rearranging Equation 22 and using the RqJA measured abo...

Страница 7: ...en the primary and secondary side of the converter The collector of the optocoupler is connected to the FB pin of the NCP1219 closing the feedback loop as shown in Figure 8 Figure 8 Feedback Network V...

Страница 8: ...he TL431 and an optocoupler The tool takes system level inputs from the user such as bulk input voltage output voltage output current and controller switching frequency A screenshot of the parameter c...

Страница 9: ...tool based on the power stage response optocoupler pole location and the type 2 compensation design The user can check the frequency response at various input voltages and load conditions to verify s...

Страница 10: ...he zero frequency fz is calculated using Equation 29 fz fC k eq 29 The zero frequency is set to 240 Hz The bandwidth of the optocoupler can be used to set the pole location of the compensation network...

Страница 11: ...10 20 30 70 200 160 120 80 40 0 40 80 120 160 200 PHASE Mag dB PM 60 fC 1 3 kHz Skip Mode for Reduced Standby Power Dissipation The NCP1219 employs an adjustable skip level that reduces input power i...

Страница 12: ...ause audible noise On the other hand when the board is operating in standby mode and the load is very low a higher skip threshold minimizes the number of switching cycles per skip cycle This reduces s...

Страница 13: ...36 The resulting sense voltage is 1 13 V Under high line conditions the desired overpower output current is 2 5 A 60 W Calculate the sense voltage associated with the desired output power using the sa...

Страница 14: ...HV R10 VCC VHOUT Latch Protection The latching fault protection offered by the NCP1219 can also be used to implement other convenient board level protection functions besides the overvoltage protectio...

Страница 15: ...ted using 2 oz copper During the layout process care was taken to 1 Minimize trace length especially for high current loops 2 Use wide traces for high current connections 3 Use a single ground connect...

Страница 16: ...NCP1219PRINTGEVB http onsemi com 16 Figure 30 Layer 1 Top Figure 31 Layer 2 Bottom...

Страница 17: ...en copper and soldermask The layout files may be available Please contact your sales representative for availability Design Validation The top and bottom view of the board are shown in Figures 32 and...

Страница 18: ...C0G2J472J Yes Yes C14 1 Capacitor Ceramic Through Hole 470 pF 250 V 10 Radial TDK FK18C0G2E471J Yes Yes C15 1 Capacitor Electrolytic 1000 uF 35 V 20 Radial United Chemicon EKZE350ELL102MK25S Yes Yes C...

Страница 19: ...Resistor SMD 1 4 MW 0 01 SM 1206 Vishay CRCW12061404FN Yes Yes R6 1 Resistor SMD 10 W 0 01 SM 1206 Vishay CRCW120610R0FN Yes Yes R9 1 Resistor Through Hole 20 W 0 01 Axial Yageo MFR 25FBF 20R0 Yes Yes...

Страница 20: ...www epcos com 3 ICE Components can be ordered at http www icecomponents com 4 Infineon components can be ordered at http www infineon com 5 Kemet components can be ordered at http www kemet com 6 TDK...

Страница 21: ...cause the forward auxiliary winding voltage is less than that required to maintain VCC greater than VCC MIN A portion of the standby input power is due to the startup circuit As the input voltage incr...

Страница 22: ...kes of noise that are due to the switch transitions Figure 37 Output Voltage Ripple at High line and Full Load If the output ripple is observed on a longer time scale a component of the NCP1219 freque...

Страница 23: ...n Figure 39 The output response to the load step is measured as 150 mV and recovery occurs in less than 5 ms Response to the transient load condition confirms the results of the loop stability analysi...

Страница 24: ...Figures 40 through 43 show several images of the board during a continuous load step as described in Figure 1 Images include top and bottom layers at low and high line All images were taken in open ai...

Страница 25: ...p onsemi com 25 Figure 42 Thermal Image of the Top of the Board at High Line During a Continuous Load Step Condition Figure 43 Thermal Image of the Bottom of the Board at High Line During a Continuous...

Страница 26: ...0 W 48 W converter is designed and built using the flyback topology The converter is implemented using the NCP1219 The average load efficiency is measured above 83 5 over the complete operating range...

Страница 27: ...inutes and start the integration cycle 20 Measure VOUT standby using the corresponding multimeter Record the results in Table 5 Verify it is within the limits of Table 4 21 Measure and the integrated...

Страница 28: ...ble 4 DESIRED RESULTS Input Voltage IOUT For 115 Vac 60 Hz input 70 mA 7 V VOUT standby 8 V 70 mA PIN 1 W IOUT specified in Table 3 VOUT 24 0 2 V 25 50 75 100 havg 83 5 For 230 Vac 50 Hz input 70 mA 7...

Страница 29: ...ication by customer s technical experts SCILLC does not convey any license under its patent rights nor the rights of others SCILLC products are not designed intended or authorized for use as component...

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