NCP1219PRINTGEVB
http://onsemi.com
12
Under light load conditions, the controller enters skip
mode. As seen in Figure 21, when V
FB
(C3) decreases to less
than V
Skip/latch
(C1) the drive pulses stop (C4). This in turn
causes V
FB
to increase as V
out
decreases.
Figure 21. Skip Mode Operation Waveforms; C1 =
V
Skip/latch
, C2 = V
CC
, C3 = V
FB
, C4 = V
DRV
For the evaluation board design, the NCP1219 default
skip threshold is used to reduce component count. Selecting
a higher skip threshold has tradeoffs. If the skip voltage is set
too high, during normal operation at nominal loads the
system is in skip mode. This can cause audible noise. On the
other hand, when the board is operating in standby mode and
the load is very low, a higher skip threshold minimizes the
number of switching cycles per skip cycle. This reduces
standby power.
Overpower Compensation
For this evaluation board, without overpower
compensation, overcurrent protection occurs at a measured
output power of 67.2 W at high line and 57.4 W at low line
conditions. The variation in overcurrent output power with
input voltage is due to the propagation delay (t
delay
) of the
PWM comparator. t
delay
has an increased effect on the power
delivered at high line than at low line as shown in Figure 22.
0
Peak Primary Current
Higher peak current
I
peak
230 Vac
120 Vac
Slope = V
bulk
/L
p
time
t
delay
t
delay
Figure 22. Overpower Effect Due to Propagation Delay
