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AR0330CS

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42

Figure 38. Single WRITE to Random Location

SPECTRAL CHARACTERISTICS

Figure 39. Bare Die Quantum Efficiency

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Содержание AR0330CS

Страница 1: ...RGB Bayer Shutter Type ERS and GRR Input Clock Range 6 27 MHz Output Clock Maximum CLK_OP 98 Mp s Parallel MIPI Responsivity 2 0 V lux sec Power Consumption 1080P30 MIPI Mode 282 mW 1080P30 Parallel...

Страница 2: ...12 bit 12 bit 12 bit 12 bit 8 10 or 12 bit Ma x 98 Mp s Parallel I O PIXCLK FV LV DOUT 11 0 MIPI I O CLK P N 1 Two lane data paths only 2 98 Mp sec Digital Core Row Noise Correction Black Level Correc...

Страница 3: ...e following working modes To operate the sensor at full speed 98Mp s the sensor must use 2 Lane MIPI or parallel interface The sensor will operate at full speed 98 Mp s when using the parallel interfa...

Страница 4: ...er planes are placed in a manner such that coupling with the digital power planes is minimized 6 TEST pin must be tied to DGND for the MIPI configuration 7 ON Semiconductor recommends that GND_MIPI be...

Страница 5: ...e constraints ON Semiconductor recommends having 0 1 mF decoupling capacitor inside the module as close to the pads as possible In addition place a 10 mF capacitor for each supply off module but close...

Страница 6: ...pulse for external light source Can be left floating if not used FRAME_VALID Output Asserted when DOUT data is valid LINE_VALID Output LINE_VALID output asserted when DOUT data is valid SHUTTER Outpu...

Страница 7: ...DOUT3 DOUT1 DOUT0 DATA2_N VDD H DGND DGND DOUT2 VDD_IO VDD_MIPI DATA2_P VDD_MIPI 22 NC Do not connect For manufacturing test purpose only Table 7 AR0330SR CSP PARALLEL PACKAGE PINOUT 1 2 3 4 5 6 7 8 A...

Страница 8: ...30 TOP VIEW NC 29 D OUT 0 28 D OUT 1 27 D OUT 2 26 D OUT 3 25 D OUT 4 24 D OUT 5 23 D OUT 6 22 D OUT 7 21 D OUT 8 20 D OUT 9 19 DOUT10 18 DOUT 11 17 LINE_VALID 16 FRAME_VALID 15 SDATA 14 FLASH 13 PIX...

Страница 9: ...set will automatically triggers a software reset Independently executing a software reset should be followed by steps seven through thirteen above 25 The sensor must be receiving the external input cl...

Страница 10: ...e The recommended power down sequence for the AR0330CS is shown in Figure 6 The available power supplies VDD_IO VDD_PLL VDD_MIPI VAA VAA_PIX must have the separation specified below 1 Disable streamin...

Страница 11: ...ply voltage VDD_PLL 2 7 2 8 2 9 V MIPI supply voltage VDD_MIPI 2 7 2 8 2 9 V Digital operating current 114 mA I O digital operating current 0 mA Analog operating current 41 mA Pixel supply current 9 9...

Страница 12: ...PLL supply voltage 0 3 4 V VDD_MIPI MIPI supply voltage 0 3 4 V tST Storage temperature 40 85 C Stresses exceeding those listed in the Maximum Ratings table may damage the device If any of these limi...

Страница 13: ...evels Sensor EXCLK 27 MHz 35 A device must internally provide a hold time of at least 300 ns for the SDATA signal to bridge the undefined region of the falling edge of SCLK 36 The maximum tHD DAT has...

Страница 14: ...Clock duty cycle 45 50 55 tJITTER Input clock jitter 0 3 ns Output pin slew Fastest CLOAD 15 pF 0 7 V ns fPIXCLK PIXCLK frequency Default 80 MHz tPD PIXCLK to data valid Default 3 ns tPFH PIXCLK to FR...

Страница 15: ...b and VCM with voltmeters for both Logic 1 and Logic 0 Figure 9 Single Ended and Differential Signals V o a V o b Single ended signal Differential signal VO D Vo a Vo b VOD Vo b Vo a VC M Vo a Vo b 2...

Страница 16: ...e Ended and Differential Signals 3 Mean Clock to Data skew should be measured from the 0V crossing point on Clock to the 0V crossing point on any Data channel regardless of edge as shown in Figure 11...

Страница 17: ...gure 13 defines the eye mask for the transmitter 0 5 UI point is the instantaneous crossing point of the Clock The area in white shows the area Data is prohibited from crossing into The eye mask also...

Страница 18: ...from the sensor OTPM One Time Programmable Memory The OTPM is configured during production The instruction set determines the length of the sequencer operation that determines the ADC Readout Limitat...

Страница 19: ...re two readout paths within the sensor digital block Figure 17 Sensor Dual Readout Paths Pixel Array All Digital Blocks S erial Output CLK_PIX CLK_PIX Pixel Rate 2 x CLK_PIX data lanes x CLK_OP Parall...

Страница 20: ...Output FVCO 588 MHz Max vt_sys_clk_div 1 vt_pix_clk_div 6 CLK_PIX 49 MHz CLK_OP 2 CLK_OP 98 Mpixel s 588 MHz 6 Output pixel rate 98 MPixel s Serial PLL Configuration Figure 19 PLL for the Serial Inter...

Страница 21: ...2 bit 10 bit 12 bit 10 bit 8 bit FVCO 768 760 768 768 768 MHz vt_sys_clk_div 2 2 4 4 4 vt_pix_clk_div 6 5 6 5 4 op_sys_clk_div 1 1 1 1 1 op_pix_clk_div 12 10 12 10 8 FSERIAL 768 760 768 768 768 MHz FS...

Страница 22: ...g output only signal pairs DATA1_P DATA1_N DATA2_P DATA2_N CLK_P CLK_N The signal pairs use both single ended and differential signaling in accordance with the the MIPI Alliance Specification for D PH...

Страница 23: ...treaming is disabled See Table 25 Table 25 RECOMMENDED MIPI TIMING CONFIGURATION Register Configuration Description 10 bit 490 Mbps lane 12 bit 588 Mbps lane Clocking Continuous 0x31B0 40 36 Frame Pre...

Страница 24: ...t of Read Row N and Reset Row K Start of Read Row N 1 and Reset Row K 1 TFINE fine_integration _time x 1 CLK_PIX TROW line_length _pck x 1 CLK_PIX Read Row N Reset Row K TFINE fine_inegration_time clk...

Страница 25: ...mber of row periods per frame and the row period The sensor frame time will increase if the coarse_integration_time is set to a value equal to or greater than the frame_length_lines The maximum integr...

Страница 26: ...0 3 0 Gain x x dB 0 1 0 1 00 1 00 0 00 0 1x 15 1 88 1 88 5 49 0 1 1 1 03 1 03 0 26 1 2x 0 1 00 2 00 6 00 0 1 2 1 07 1 07 0 56 1 2x 2 1 07 2 13 6 58 0 1 3 1 10 1 10 0 86 1 2x 4 1 14 2 29 7 18 0 1 4 1 1...

Страница 27: ...AR0330CS www onsemi com 27 Refer to Real Time Context Switching for the analog and digital gain registers in both context A and context B modes...

Страница 28: ...e transition from old to new integration time in such a way that the stream of output frames from the AR0330CS switches cleanly from the old integration time to the new while only generating frames wi...

Страница 29: ...o that row readout starts from y_addr_end and ends at y_addr_start Figure 30 shows a sequence of 6 rows being read out with R0x3040 15 0 and R0x3040 15 1 Changing this bit causes the Bayer order of th...

Страница 30: ...xel pair will be read together As well that the sensor will read a Gr R row first followed by a B Gb row x subsampling factor 1 x_odd_inc 2 eq 16 y subsampling factor 1 y_odd_inc 2 eq 17 A value of 1...

Страница 31: ...mpling y_odd_inc 1 skip 1 1 0 5 1x row_bin 0 The horizontal FOV must be programmed to meet the following rule y_addr_end y_addr_start 1 y_odd_inc 1 2 even number Skip 2x y_odd_inc 3 skip 1 3 0 5 2x ro...

Страница 32: ...ludes both the active pixels and the horizontal blanking time per row The sensor utilizes two readout paths as seen in Figure 17 allowing the sensor to output two pixels during each pixel clock The mi...

Страница 33: ...180 0x00F0 OB Rows minimum_vertical_blanking 0x8 Default 8 OB Rows 8 OB 4 12 0x4 4 OB Rows 4 OB 4 8 0x2 2 OB Rows 2 OB 4 6 The locations of the OB rows embedded rows and blank rows within the frame re...

Страница 34: ...tart of frame N Blank Rows 2 rows Extra Vertical Blanking frame_length_lines min_frame_length_lines The period between the rising edge of the VD signal and the slave mode ready Extra Delay clocks Slav...

Страница 35: ...gration of the last row is therefore started before the end of the programmed integration for the first row The row shutter and read operations will stop when the slave mode becomes active and is wait...

Страница 36: ...n time is configured to 8 33 ms When the slave mode becomes active the sensor will pause both row read and row reset operations NOTE The row integration period is defined as the period from row reset...

Страница 37: ...illustrates how the sensor active readout time can be minimized while reducing the frame rate CHANGING SENSOR MODES Register Changes All register writes are delayed by 1x frame A register that is wri...

Страница 38: ..._CB 0x308C x_addr_end 0x3008 x_addr_end_CB 0x308E y_addr_end 0x3006 y_addr_end_CB 0x3090 Y_odd_inc 0x30A6 Y_odd_inc_CB 0x30A8 X_odd_inc 0x30A2 X_odd_inc_CB 0x30AE ADC_HIGH_SPEED 0x30BA 6 ADC_HIGH_SPEE...

Страница 39: ...pixels Test_Pattern_Blue R0x3076 for blue pixels and Test_Pattern_Red R0x3072 for red pixels Table 35 Test Pattern Modes Test_Pattern_Mode Test Pattern Output 0 No test pattern normal operation 1 Sol...

Страница 40: ...is the master when writing or the slave when reading releases SDATA The receiver indicates an acknowledge bit by driving SDATA LOW As for data transfers SDATA can change when SCLK is LOW and must be s...

Страница 41: ...ntinues to perform byte READs until L bytes have been read Figure 36 Sequential READ Start From Random Location Previous Reg Address N Reg Address M S0 Slave Address A A Reg Address 15 8 P A M 1 A A A...

Страница 42: ...AR0330CS www onsemi com 42 Figure 38 Single WRITE to Random Location SPECTRAL CHARACTERISTICS Figure 39 Bare Die Quantum Efficiency...

Страница 43: ...218 6 75 45 1 371 7 57 50 1 523 8 37 55 1 675 9 16 60 1 828 9 90 65 1 980 10 58 70 2 132 11 15 75 2 284 11 57 80 2 437 11 80 85 2 589 11 78 90 2 741 11 48 95 2 894 10 88 100 3 046 9 96 40 The CRA lis...

Страница 44: ...is located at the bottom left of the package look at the package This orientation will ensure that the image captured using a lens will be oriented correctly Figure 40 Image Orientation With Relation...

Страница 45: ...nts Industries LLC 2002 October 2002 Rev 0 Case Outline Number XXX DOCUMENT NUMBER STATUS REFERENCE DESCRIPTION 98AON94058F ON SEMICONDUCTOR STANDARD ODCSP61 6 3X6 6 Electronic versions are uncontroll...

Страница 46: ...uding Typicals must be validated for each customer application by customer s technical experts SCILLC does not convey any license under its patent rights nor the rights of others SCILLC products are n...

Страница 47: ...cts for any particular purpose nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including...

Страница 48: ...dated for each customer application by customer s technical experts ON Semiconductor does not convey any license under its patent rights nor the rights of others ON Semiconductor products are not desi...

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