![background image](http://html1.mh-extra.com/html/omron/cj1w-drm21/cj1w-drm21_operation-manual_742341165.webp)
4-25
4 Remote I/O Master Communications
CJ-series DeviceNet Units Operation Manual for NJ-series CPU Unit(W497)
4-4 User
-set A
llocation
s
4
4-4-2 Settings thro
ugh De
vice V
a
riab
les f
o
r CJ-s
er
ies Unit (Master Use
r-set Allocations
S
e
tup
Ta
b
le
)
CX-Integrator Setting Methods
Refer to
CX-Integrator Ver.2.
@
OPERATION MANUAL
(Cat. No. W464).
All slaves are allocated words in order of node addresses in two blocks: OUT block 1 and IN block 1.
In the block area, the first word is set with
*_MstrAlocTblCfg[0 to 3]
. In addition, an Allocation Size
Setup Table is created in the area and word location is specified through
*_MstrAlocTblCfg[4 and 5]
,
and you can define the size for each block. To access the area where the slave is allocated from the
user program, a user-defined variable that specifies the AT specification of that area needs to be
defined.
You can set the block allocation order and block allocation areas. Node addresses in each block are
allocated words in ascending order from 0 to 63. Node addresses that are not allocated are skipped
(not allocated words). Each address is allocated at least one word (rightmost byte, 1 word, or multi-
ple words).
•
More than one word is allocated for each slave (according to it's node address) with more
than16 I/O points.
•
The rightmost byte of the word is allocated to each slave that has 8 I/O points or less.
Note
You can include multiple Master Units in a single CPU Unit as shown below with the use of
user-set allocations (16 Units max.).
4-4-2
Settings through Device Variables for CJ-series Unit (Master
User-set Allocations Setup Table)
Area specified in I/O memory
Bit
First word specified
Bit
First word specified
OUT block 1
IN block 1
OUT areas
Bit
First word
specified
Address 0
Node addresses
in ascending order
Addresses are in ascending order.
Not all nodes need to be allocated
and addresses for nodes with no
allocations are skipped.
IN areas
Bit
First word specified
Address 0
Node addresses
in ascending order
Output to Slaves
Input from Slaves
to
to
to
to
to
to
Addresses are in ascending order.
Not all nodes need to be allocated
and addresses for nodes with no
allocations are skipped.
Master Unit
Master Unit
Slave
Slave
Содержание CJ1W-DRM21
Страница 12: ...Manual Structure 10 CJ series DeviceNet Units Operation Manual for NJ series CPU Unit W497 ...
Страница 42: ...Revision History 40 CJ series DeviceNet Units Operation Manual for NJ series CPU Unit W497 ...
Страница 214: ...6 Message Communications 6 26 CJ series DeviceNet Units Operation Manual for NJ series CPU Unit W497 ...
Страница 345: ...Index 1 CJ series DeviceNet Units Operation Manual for NJ series CPU Unit W497 I Index ...
Страница 349: ......