MG-IP TDM Over IP Gateway Reference Manual
35
Framing and Signaling Options
MG-IP units support two framing options each for E1 and T1 ports:
E1: PCM30 or PCM31
T1: D4 or ESF
E1 frames are transmitted from a MG-IP to its peer without time slot 0. Time slot 16 can be assigned to
a session unless the TDM port is defined as PCM30. In that case, time slot 16 is used for CAS
signaling and cannot be assigned to a specific session.
A T1 frame consists of 193 bits: 8 x 24 time slots plus the F-bit. The F-bit is not sent in a pseudowire.
When the MG-IP is configured for T1 and the channel bandwidth is 64Kbps, all eight bits of a time slot
are used for data. If the channel bandwidth is configured for 56Kbps, the robbed bit is used for channel
associated signaling and is transmitted out-of-stream.
Clocks
External Clock:
Input: 1.544 MHz or 2.048 MHz clock (
LVTTL ONLY
for BNC connector). The device uses
this as the TDM Tx clock (configured as input using CLI). Used either via the BNC
connector, or via one of the E1/T1 interfaces. When using the BNC connector, a jumper on the
internal board is used to select this external clock input. Jumper No J30 must be shorted.
Output: 1.544 MHz or 2.048 MHz TDM Tx clock used by the device loopback, or internal
clock on the Master, or the recovered clock on the Slave (configured as output using CLI).
Used either via the BNC connector, or via on of the E1/T1 interfaces. When using the BNC
connector, a jumper on the internal board is used to select this external clock output. Jumper
No J31 must be shorted.
Figure 26: External Clock Jumpers
Internal Clock:
System Clock Reference: 1ppm system clock provided by the device temperature-
compensated crystal oscillator (TCXO). The TCXO is sufficiently accurate to meet the ITU
standards for jitter and wander.
If a more stringent standard is required, a more accurate and stable clock source can be
provided by the user application. This could be an oven-controlled crystal oscillator (OCXO)
with 0.05ppm (25MHz) precision or better installed on the internal board for use in systems
requiring extra precision clock recovery. A jumper on the internal pigitailed board is used to
select this internal clock source. See the bellow picture for PIN settings.
J30
J31