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NXP Semiconductors
UM11712
PCAL6534EV-ARD evaluation board
PCAL6534
(U1) pin
Direction
CPLD
(U2) pin
LED
Switch
16 BIT – I/
O PORT (J6)
8 BIT – I/O
PORT (J7)
10 BIT – I/
O PORT (J9)
P1_5
I/O
IO_24
-
-
16
-
-
P1_6
I/O
IO_25
-
-
17
-
-
P1_7
I/O
IO_26
-
-
18
-
-
P2_0
Output
-
D4
-
-
2
-
P2_1
Output
-
D5
-
-
3
-
P2_2
Output
-
D6
-
-
4
-
P2_3
Output
-
D7
-
-
5
-
P2_4
Output
-
D8
-
-
6
-
P2_5
Output
-
D9
-
-
7
-
P2_6
Output
-
D10
-
-
8
-
P2_7
Output
-
D11
-
-
9
-
P3_0
I/O
-
-
-
-
-
3
P3_1
I/O
-
-
-
-
-
4
P3_2
I/O
-
-
-
-
-
5
P3_3
I/O
-
-
-
-
-
6
P3_4
I/O
-
-
-
-
-
7
P3_5
Input
-
-
SW1
-
-
8
P3_6
Input
-
-
SW2
-
-
9
P3_7
Input
-
-
SW3
-
-
10
P4_0
Input
-
-
SW4
-
-
11
P4_1
Input
-
-
SW5
-
-
12
Table 2. The I/O allocation table
...continued
The on-board LEDs can be disabled by placing JP1 jumper in 2-3 position (OPTION
1, see SPF-46656.pdf file). This feature is useful when the user uses the board with
external device connected to J5 I/O port. The switches are connected to the bus through
620 Ω series resistors (R53 – R57), to avoid bus conflict (short-circuit if the line is set
accidentally as output and the switch is pressed).
4.9 CPLD
The PCAL6534EV-ARD board contains a MAX V series CPLD from Intel/Altera (U2,
5M80ZE64C5N). The role of this IC is decoder / driver for the on-board four-digit LED
display (D13 to D16). The CPLD works as signal bridge between the ports P0 and P1
of the PCAL6534 IC and the LED displays. Additionally, a six lines control bus is linked
between MAX V CPLD and the Arduino port. For details, see SPF-46656.pdf schematic
file of PCAL6534EV-ARD daughterboard. The internal firmware of the MAX V CPLD is
controlled from the GUI application through the control bus. The CPLD control bus sets
the operation modes of MAX V CPLD. The MAX_CLK line is not used (IO_5/CLK0 pin of
details the operation modes and the corresponding logic states of
CPLD control bus.
UM11712
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2022. All rights reserved.
User manual
Rev. 1.0 — 31 January 2022
10 / 31