NXP Semiconductors T2080RDB-PC, Руководство пользователя, Страница: 38 / 47

CHIPID1 field descriptions
Field Description
0–7
CHIPID1
0x55, Identification of the CPLD image.
3.1.2 Chip ID2 register (CHIPID2)
Address: 0h base + 1h offset = 1h
Bit 0 1 2 3 4 5 6 7
Read CHIPID2
Write
Reset 1 0 1 0 1 0 1 0
CHIPID2 field descriptions
Field Description
0–7
CHIPID2
0xaa, Identification of the CPLD image.
3.1.3 Hardware version register (HWVER)
Hardware version register.
Address: 0h base + 2h offset = 2h
Bit 0 1 2 3 4 5 6 7
Read HW_VER
Write
Reset 0 0 0 0 0 0 0 0
HWVER field descriptions
Field Description
0–7
HW_VER
The version field of the hardware board.
CPLD Memory Map
QorIQ T2080 Reference Design Board (T2080RDB-PC) User Guide, Rev. 0, 04/2016
38 Freescale Semiconductor, Inc.