
Table 2. i.MX RT595 EVK expansion headers (continued)
Index
Circuit Ref.
Description
Reference
4
J31
External DMIC header.
Provides access to all DMIC (PDM) clock and data lines.
5
J36
PMod/Host connector.
This connector provides access to the SPI and I2C ports of
the i.MX RT595 that are also designated for ISP boot. This
connector can be used to work with a remote host, or as
an interface to off-the-shelf PMod expansion boards
J37
Battery Charger
Schematic
J43
FLEXIO/LCD Socket
J44
MPI/LCD module
6
J47
Expansion header
7
JP25
USART header
8
JP26
High-speed SPI header
Table 3. Jumper settings
Index
Reference
Default
Description
1
JS1
1-2
IF_DETECT
2
JP1
OPEN
LINK2 ISP BOOT: Link2 (LPC43xx) force DFU boot.
Leave this jumper open (default) for Link2 to follow the normal boot
sequence. The Link2 will boots from internal flash if image is found there.
With the internal flash erased the Link2 normal boot sequence will fall
through to DFU boot.
Install this jumper to force the Link2 to DFU boot mode. Use this setting to
reprogram the Link2 internal flash with a new image (using the LPCScrypt
utility) or to use the MCUXpresso IDE with CMSIS-DAP protocol.
Link2 flash is pre-programmed with a version of CMSIS-
DAP firmware by default.
NOTE
3
JP3
OPEN
Target processor selection for the on-board Debug Probe. Jumper open
(default) the i.MX RT595 Target SWD interface enabled. Normal operating
mode where the Target SWD is connected to either the on-board Link2
Debug Probe or an external Debug Probe.
Jumper shunted, the i.MX RT595 Target SWD interface is disabled. Use
this setting only when the on-board Link2 Debug Probe is used to debug an
off-board target MCU.
Table continues on the next page...
NXP Semiconductors
Board layout and settings
MIMXRT595 EVK Board Hardware User's Guide, Rev. 0, 02/2021
User's Guide
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