NXP Semiconductors LS1028ARDB, Руководство по началу работы, Страница: 9 / 18

Table 6. Switch settings (continued)
Switch Supported function Description
SW3[1] CFG_ENG_USE0 SW_enguse[0]
• 0: Reserved
• 1: Reserved (default setting)
SW3[2:4]
Device type selection
TEST_SEL_B,
CFG_SVR[0:1]
Table 8.
TESTSEL_
B SVR[0] SVR[1] PVR/SVR Part Descriptio
n
1 1 1 870B_0010 LS1028AE 2 cores,
GPU
enabled
(Default
setting)
0 1 1 870B_0410 LS1027AE 2 cores,
GPU
disabled
1 0 1 870B_2010 LS1018AE 1 core,
GPU
enabled
0 0 1 870B_2410 LS1017AE 1 core,
GPU
disabled
X X 0 Varies Unassigne
d -
SW3[5:6] UART2 configuration
CFG_MUX_UART2_SEL0
SW_UART2MAP[1:0]
• 0x: UART2 on DB9 connector (default setting)
• 10: UART2 on mikroBUS
™
click module 1
• 11: UART2 on mikroBUS click module 2
SW3[7]
PWM configuration
CFG_MUX_PWM2uBUS1_B
CFG_MUX_PWM2uBUS2_B
SW_UCLICK_PWMMAP
• 0: PWM signal routed to mikroBUS click module 1 (default setting)
• 1: PWM signal routed to mikroBUS click module 2
SW3[8]
SPI configuration
CFG_MUX_SPI2uBUS1_B
CFG_MUX_SPI2uBUS2_B
SW_UCLICK_SPIMAP
• 0: SPI signal routed to mikroBUS click module 1 (default setting)
• 1: SPI signal routed to mikroBUS click module 2
Table continues on the next page...
NXP Semiconductors
DIP switches
QorIQ LS1028A Reference Design Board Getting Started Guide, Rev. 0, 2/2019
User's Guide
9 / 18