NXP Semiconductors KITVR5510 A0EVM Series Скачать руководство пользователя страница 29

NXP Semiconductors

UM11587

KITVR5510xA0EVM Evaluation Kit User Guideline

10 Legal information

10.1  Definitions

Draft

 — A draft status on a document indicates that the content is still

under internal review and subject to formal approval, which may result

in modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included in a draft version of a document and shall have no

liability for the consequences of use of such information.

10.2  Disclaimers

Limited warranty and liability

 — Information in this document is believed

to be accurate and reliable. However, NXP Semiconductors does not

give any representations or warranties, expressed or implied, as to the

accuracy or completeness of such information and shall have no liability

for the consequences of use of such information. NXP Semiconductors

takes no responsibility for the content in this document if provided by an

information source outside of NXP Semiconductors. In no event shall NXP

Semiconductors be liable for any indirect, incidental, punitive, special or

consequential damages (including - without limitation - lost profits, lost

savings, business interruption, costs related to the removal or replacement

of any products or rework charges) whether or not such damages are based

on tort (including negligence), warranty, breach of contract or any other

legal theory. Notwithstanding any damages that customer might incur for

any reason whatsoever, NXP Semiconductors’ aggregate and cumulative

liability towards customer for the products described herein shall be limited

in accordance with the Terms and conditions of commercial sale of NXP

Semiconductors.

Right to make changes

 — NXP Semiconductors reserves the right to

make changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

Suitability for use

 — NXP Semiconductors products are not designed,

authorized or warranted to be suitable for use in life support, life-critical or

safety-critical systems or equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors and its suppliers accept no liability for

inclusion and/or use of NXP Semiconductors products in such equipment or

applications and therefore such inclusion and/or use is at the customer’s own

risk.

Applications

 — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes

no representation or warranty that such applications will be suitable

for the specified use without further testing or modification. Customers

are responsible for the design and operation of their applications and

products using NXP Semiconductors products, and NXP Semiconductors

accepts no liability for any assistance with applications or customer product

design. It is customer’s sole responsibility to determine whether the NXP

Semiconductors product is suitable and fit for the customer’s applications

and products planned, as well as for the planned application and use of

customer’s third party customer(s). Customers should provide appropriate

design and operating safeguards to minimize the risks associated with

their applications and products. NXP Semiconductors does not accept any

liability related to any default, damage, costs or problem which is based

on any weakness or default in the customer’s applications or products, or

the application or use by customer’s third party customer(s). Customer is

responsible for doing all necessary testing for the customer’s applications

and products using NXP Semiconductors products in order to avoid a

default of the applications and the products or of the application or use by

customer’s third party customer(s). NXP does not accept any liability in this

respect.

Terms and conditions of commercial sale

 — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individual agreement. In case an individual

agreement is concluded only the terms and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

Export control

 — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from competent authorities.

Evaluation products

 — This product is provided on an “as is” and “with all

faults” basis for evaluation purposes only. NXP Semiconductors, its affiliates

and their suppliers expressly disclaim all warranties, whether express,

implied or statutory, including but not limited to the implied warranties of

non-infringement, merchantability and fitness for a particular purpose. The

entire risk as to the quality, or arising out of the use or performance, of this

product remains with customer. In no event shall NXP Semiconductors, its

affiliates or their suppliers be liable to customer for any special, indirect,

consequential, punitive or incidental damages (including without limitation

damages for loss of business, business interruption, loss of use, loss of

data or information, and the like) arising out the use of or inability to use

the product, whether or not based on tort (including negligence), strict

liability, breach of contract, breach of warranty or any other theory, even if

advised of the possibility of such damages. Notwithstanding any damages

that customer might incur for any reason whatsoever (including without

limitation, all damages referenced above and all direct or general damages),

the entire liability of NXP Semiconductors, its affiliates and their suppliers

and customer’s exclusive remedy for all of the foregoing shall be limited to

actual damages incurred by customer based on reasonable reliance up to

the greater of the amount actually paid by customer for the product or five

dollars (US$5.00). The foregoing limitations, exclusions and disclaimers shall

apply to the maximum extent permitted by applicable law, even if any remedy

fails of its essential purpose.

Translations

 — A non-English (translated) version of a document is for

reference only. The English version shall prevail in case of any discrepancy

between the translated and English versions.

Security

 — Customer understands that all NXP products may be subject

to unidentified or documented vulnerabilities. Customer is responsible

for the design and operation of its applications and products throughout

their lifecycles to reduce the effect of these vulnerabilities on customer’s

applications and products. Customer’s responsibility also extends to other

open and/or proprietary technologies supported by NXP products for use

in customer’s applications. NXP accepts no liability for any vulnerability.

Customer should regularly check security updates from NXP and follow up

appropriately. Customer shall select products with security features that best

meet rules, regulations, and standards of the intended application and make

the ultimate design decisions regarding its products and is solely responsible

for compliance with all legal, regulatory, and security related requirements

concerning its products, regardless of any information or support that may

be provided by NXP. NXP has a Product Security Incident Response Team

(PSIRT) (reachable at [email protected]) that manages the investigation,

reporting, and solution release to security vulnerabilities of NXP products.

10.3  Trademarks

Notice: All referenced brands, product names, service names and

trademarks are the property of their respective owners.

NXP

 — wordmark and logo are trademarks of NXP B.V.

UM11587

All information provided in this document is subject to legal disclaimers.

© NXP B.V. 2021. All rights reserved.

User manual

Rev. 1 — 3 May 2021

29 / 32

Содержание KITVR5510 A0EVM Series

Страница 1: ...Keywords VR5510 KITVR5510xA0EVM evaluation kit automotive multi output power management integrated circuit Abstract This user manual describes how to use the KITVR5510xA0EVM evaluation kit The VR5510...

Страница 2: ...Kit User Guideline Rev Date Description v 1 20210503 Initial version Modifications NA Revision history UM11587 All information provided in this document is subject to legal disclaimers NXP B V 2021 A...

Страница 3: ...in the evaluation design implementation and validation of VR5510 Power Management Integrated Circuit PMIC for high performance applications The scope of this document is to provide the user with info...

Страница 4: ...and tools parametrics ordering information and a Getting Started tab The Getting Started tab provides quick reference information applicable to using the KITVR5510xA0EVM evaluation board including the...

Страница 5: ...5 0 V to 24 0 V and current limit set initially to 100 mA Two power supply cables with banana connectors at one end 3 3 Windows PC workstation This evaluation board requires a Windows PC workstation...

Страница 6: ...evice The KITVR5510xA0EVM includes NXPs FRDM K82F development platform board The FRDM K82F attaches to the bottom of the board and serves as the communication interface between the KITVR5510xA0EVM and...

Страница 7: ...eleased D6 Green RSTB_G External RSTB signal RSTB released D12 Red RSTB_R External RSTB signal RSTB asserted low D13 Red PGOOD_R External PGOOD signal PGOOD asserted low D14 Red INTB External INTB sig...

Страница 8: ...Figure 2 Connectors Figure 2 shows all of the connectors on the KITVR5510xA0EVM Pinouts for individual connectors are shown in the schematic UM11587 All information provided in this document is subjec...

Страница 9: ...11 Debug mode selection 2 3 shorted default GND to normal mode 1 2 shorted 7P5V generated from VBAT VIN directly J12 Debug mode selection 2 3 shorted default 7P5V generated from an onboard regulator 1...

Страница 10: ...default open 1 2 shorted default VMON1 VPRE 3 3 V 3 4 shorted default VMON2 BUCK3 1 1 V 5 6 shorted default VMON3 LDO2 1 8 V 7 8 shorted default VMON4 LDO1 1 8 V 9 10 shorted VMON4 BOOST 5 V J101 Regx...

Страница 11: ...horted default BUCK2 in both Single and Multiphase Table 2 Jumpers continued 4 3 4 Test points Figure 4 shows the location and the function of the test points on the KITVR5510xA0EVM board Figure 4 Tes...

Страница 12: ...Kit User Guideline 5 Layout Figure 5 KITVR5510xA0EVM layout top Figure 6 KITVR5510xA0EVM layout layer 2 UM11587 All information provided in this document is subject to legal disclaimers NXP B V 2021 A...

Страница 13: ...ion Kit User Guideline Figure 7 KITVR5510xA0EVM layout layer 3 Figure 8 VR551 xA0EVM layout layer 4 UM11587 All information provided in this document is subject to legal disclaimers NXP B V 2021 All r...

Страница 14: ...n Kit User Guideline Figure 9 KITVR5510xA0EVM layout layer 5 Figure 10 KITVR5510xA0EVM layout layer 6 UM11587 All information provided in this document is subject to legal disclaimers NXP B V 2021 All...

Страница 15: ...n Kit User Guideline Figure 11 KITVR5510xA0EVM layout layer 7 Figure 12 KITVR5510xA0EVM layout bottom UM11587 All information provided in this document is subject to legal disclaimers NXP B V 2021 All...

Страница 16: ...26 C66 C67 C94 C102 C176 C177 0 1 F CAP CER 0 1 F 50 V 10 X7R AEC Q200 0402 GCM155R71H104KE02 MURATA 1 C162 0 047 F CAP CER 0 047 F 50 V 10 X7R AEC Q200 0603 CGA3E2X7R1H473K 080AA TDK 1 C163 47 F CAP...

Страница 17: ...02 RK73H1ETTP6203F KOA SPEER 1 R252 115 K RES MF 115 K 1 10 W 1 AEC Q200 0402 RK73H1ETTP1153F KOA SPEER 1 R258 1 00 K RES MF 1 00 K 1 10 W 0 1 AEC Q200 0603 ERA3AEB102V PANASONIC 1 R259 10 K RES MF 10...

Страница 18: ...1 0 H IND PWR 1 0 H 100KHz 17 9A 20 AEC Q200 SMD SPM6545VT 1R0M D TDK 3 L4 L5 L6 1 0 H IND PWR 1 0 H 1 MHZ 4 7A 20 AEC Q200 SMD TFM252012ALMA1R0 MTAA TDK 1 L7 4 7 H IND PWR 4 7 H 100 kHz 11A 20 AEC Q2...

Страница 19: ...m board 3 Drag and drop the downloaded file 0244_k20dx_bootloader_update_0x8000 bin into the BOOTLOADER drive Note Ensure that enough time is allowed for the firmware to be saved in the boot loader 4...

Страница 20: ...ry DAPLink bootloader update 4 Disable the storage services Run services msc then double click on the storage service from the list and press the stop button 5 Press the RST push button on the Freedom...

Страница 21: ...ot available during the development phase the following steps can be taken to operate the PMIC in different modes 1 If the FRDM K82F board must be programmed or if the firmware must be flashed again f...

Страница 22: ...ating with VR5510 on the reference board follow the steps in Section 7 3 Connecting to the KITVR5510xA0EVM board Figure 14 Connecting to a reference board with K82F only UM11587 All information provid...

Страница 23: ...the NXPGUI tool 1 To open the OTP configuration tool click the OTP icon on the left side of the NXPGUI The OTP tool can be used independently of the EV kit board status the board does not have to be...

Страница 24: ...be in position 2 ON Set SW2 to ON position enables the debug mode of operation Turns on the part in debug mode 6 When the PMIC is ON verify the debug mode of operation by reading the FS_STATES 0x18 re...

Страница 25: ...follow the steps mentioned in Section 8 1 Operating in debug mode An OTP script can be created using the OTP section of the tool as explained above in Section 8 1 Operating in debug mode 1 Follow step...

Страница 26: ...ramming separately then select the target state machine and click the program button Follow the instructions 7 If the OTP fuse burning was successful the progress is updated and the fuse box status is...

Страница 27: ...User Guideline burning power cycle the board and check if the part turns on with the expected configuration UM11587 All information provided in this document is subject to legal disclaimers NXP B V 20...

Страница 28: ...pdf VR5510 Data sheet VR5510 Multi Output PMIC with SMPS and LDO data sheet https www nxp com docs en data sheet VR5510 pdf VR5510 Safety Manual VR5510 Multi Output PMIC with SMPS and LDO Safety manua...

Страница 29: ...customer s third party customer s NXP does not accept any liability in this respect Terms and conditions of commercial sale NXP Semiconductors products are sold subject to the general terms and condi...

Страница 30: ...r Guideline Tables Tab 1 LEDs 7 Tab 2 Jumpers 9 Tab 3 Bill of Materials KITVR5510MA0EVM 16 Tab 4 References 28 UM11587 All information provided in this document is subject to legal disclaimers NXP B V...

Страница 31: ...14 Fig 11 KITVR5510xA0EVM layout layer 7 15 Fig 12 KITVR5510xA0EVM layout bottom 15 Fig 13 Freedom board 19 Fig 14 Connecting to a reference board with K82F only 22 Fig 15 NXP GUI OTP configuration t...

Страница 32: ...ring Software and Tools 19 7 1 Freedom board BOOTLOADER refresh in a Windows 7 system 19 7 2 Freedom Board BOOTLOADER Refresh in a Windows 10 System 20 7 3 Connecting to the KITVR5510xA0EVM board 21 7...

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