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NXP Semiconductors

UM11650

KIT-TPLSNIFEVB tool

Pin

Signal

Description

6

GND

Ground

7

RXCSB

SPI chip select

8

GND

Ground

Table 1. ANALYZER connector (J3) pin assignment

...continued

Figure 7. ANALYZER connector pinout

The supplied 8-pin connection cable should be plugged into the ANALYZER connector

with the blue wires on top (NXP logo side) and the black wires on the bottom.

5.2.1.1 Interfacing with the Saleae Logic Analyzer

The supplied 8-pin connectors cable is fitting the Saleae Logic 8 and Logic Pro 8/16

analyzer series input connectors. To connect to the Saleae Logic Analyzer, the cable

should be plugged with the blue wires on top (Saleae logo side) and the black wires on

the bottom.

UM11650

All information provided in this document is subject to legal disclaimers.

© NXP B.V. 2021. All rights reserved.

User manual

Rev. 1 — 4 August 2021

9 / 14

Содержание KIT-TPLSNIFEVB

Страница 1: ...4 August 2021 User manual Document information Information Content Keywords TPL Transformer Physical Layer decoder TPL sniffer Abstract This document helps users understand how to use the KIT TPLSNIF...

Страница 2: ...tool Revision history Rev Date Description v 1 20210804 Initial version Revision history UM11650 All information provided in this document is subject to legal disclaimers NXP B V 2021 All rights rese...

Страница 3: ...e TPL sniffer works in listen mode only The corresponding received data in SPI format is available on a data output port to be connected to a logic analyzer and its software which provides further ana...

Страница 4: ...nline resources for this evaluation board and its supported device s on http www nxp com The information page for KIT TPLSNIFEVB tool is at http www nxp com KIT TPLSNIFEVB The information page provide...

Страница 5: ...TPL frames For additional details go to http www nxp com KIT TPLSNIFEVB 4 Getting to know the hardware 4 1 KIT TPLSNIFEVB features Internal galvanic isolation between the TPL and rest of the circuits...

Страница 6: ...two sides are galvanically isolated from each other that is the TPL bus connectors are isolated from all other accessible points on the housing 5 1 Connecting to the TPL bus As shown in Figure 4 the T...

Страница 7: ...ate different loads on the TPL bus interface These are R13 default DNP and R14 and R15 default 0 Note If the board must be modified and then powered without housing proceed with caution 5 2 Power and...

Страница 8: ...f the cable should only be loaded with high impedance terminations such as a High Z input from an oscilloscope for example 15 pF 1 M or 5 pF 10 M better or digital inputs from a logic analyzer for exa...

Страница 9: ...p NXP logo side and the black wires on the bottom 5 2 1 1 Interfacing with the Saleae Logic Analyzer The supplied 8 pin connectors cable is fitting the Saleae Logic 8 and Logic Pro 8 16 analyzer serie...

Страница 10: ...e automatic shutdown feature found on most consumer USB power banks Such a shutdown would likely occur due to the limited power consumption of the TPL sniffer circuit alone in the 10 mA to 20 mA range...

Страница 11: ...Fit3 0 crimp pin Reference No 43030 0001 Power connector USB Micro B receptacle Data connector on TPL sniffer AMPHENOL 4x2 header 2 54 mm Reference No 75867 132LF GND connector HIRSHMANN 2 mm Test soc...

Страница 12: ...rd party customer s NXP does not accept any liability in this respect Terms and conditions of commercial sale NXP Semiconductors products are sold subject to the general terms and conditions of commer...

Страница 13: ...tics 11 Figures Fig 1 KIT TPLSNIFEVB 3 Fig 2 TPL sniffer toolchain 4 Fig 3 Kit contents 5 Fig 4 TPL sniffer block diagram 6 Fig 5 TPL bus connectors 7 Fig 6 Power and data connectors 8 Fig 7 ANALYZER...

Страница 14: ...data connections 7 5 2 1 Connecting to the logic analyzer 8 5 2 1 1 Interfacing with the Saleae Logic Analyzer 9 5 2 2 Powering the TPL sniffer 10 5 2 2 1 Power bank keep alive function 10 6 Hardware...

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