NXP Semiconductors FRDM-K20D50M Скачать руководство пользователя страница 11

 
 
 

 

Freescale Semiconductor, Inc 

FRDM-K20D50MUM 

Page 11 of 17 

 

 

Feature 

Description 

Ultra low power

 

-11 low-power modes with power and clock gating for optimal peripheral 
activity and recovery times. Stop currents of <190 nA (VLLS0), run currents of 
<280 uA/MHz, 4 µs wake-up from Stop mode 
-Full memory and analog operation down to 1.71V for extended battery life  
-Low-leakage wake-up unit with up to eight internal modules and sixteen pins 
as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) 
modes 
-Low-power timer for continual system operation in reduced power states 

Flash, SRAM and 

FlexMemory 

-32 KB-128 KB flash featuring fast access times, high reliability, and four levels 
of security protection 
-16 KB of SRAM 
-2 KB of FlexMemory (user-segmentable byte write/erase EEPROM for data 
tables/system data) 
-EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts 
without data loss or corruption) 
-No user or system intervention to complete programming and erase functions 
and full operation down to 1.71V 
-FlexNVM adds up 32 KB for extra program code, data or EEPROM backup 

Mixed-signal capability 

-High-speed 16-bit ADC with configurable resolution 
-Single or differential output modes for improved noise rejection 
-500 ns conversion time achievable with programmable delay block triggering 
-Two  high-speed comparators providing fast and accurate motor over-current 
protection by driving PWMs to a safe state 
-Optional analog voltage reference provides an accurate reference to analog 
blocks and replaces external voltage references to reduce system cost 

Performance 

-50 MHz ARM Cortex-M4 core with DSP instruction set, single cycle MAC, and 
single instruction multiple data (SIMD) extensions 
-Up to four channel DMA for peripheral and memory servicing with reduced 
CPU loading and faster system throughput 
-Cross bar switch enables concurrent multi-master bus accesses, increasing bus 
bandwidth 
-Independent flash banks allowing concurrent code execution and firmware 
updating with no performance degradation or complex coding routines 

Содержание FRDM-K20D50M

Страница 1: ...Freescale Semiconductor Inc Microcontroller Solutions Group FRDM K20D50M User s Manual FRDM K20D50M UM Rev 1 2...

Страница 2: ...D50M Hardware Description 7 5 1 1 Power Supply 7 5 1 2 Serial and Debug Adapter OpenSDA 9 5 1 3 Clock source 12 5 1 4 USB Interface 13 5 1 5 Serial Port 13 5 1 6 Reset 13 5 1 7 Debug 13 5 1 8 Capaciti...

Страница 3: ...20D50M features a K20DX128VLH5 this device boasting a max operating frequency of 50MHz 128KB of flash a full speed USB controller and loads of analog and digital peripherals The FRDM K20D50M hardware...

Страница 4: ...FRDM K20D50M hardware FRDM K20D50M Design Package Zip file containing all design source files for the FRDM K20D50M hardware OpenSDA User s Guide Overview and instructions for use of the OpenSDA embedd...

Страница 5: ...interface o P E Debug interface provides run control debugging and compatibility with IDE tools o CMSIS DAP interface new ARM standard for embedded debug interface o Data logging application Figure 1...

Страница 6: ...or Inc FRDM K20D50MUM Page 6 of 17 Figure 2 FRDM K20D50M main components placement J19 I O Header J2 I O Header J10 J9 K20D50M Capacitive Touch Slider RGB LED Light Sensor Reset OpenSDA K20D50M USB Ac...

Страница 7: ...n board using a 3 3V linear regulator to produce the main power supply The other two sources are not regulated on board Table 2 provides the operational details and requirements for the power supplies...

Страница 8: ...D50M K20D50M MCU supply Header J4 provides a convenient means for energy consumption measurements 2 P3V3_SDA OpenSDA circuit supply Header J3 provides a convenient means for energy consumption measure...

Страница 9: ...can also be used to place the OpenSDA circuit into Bootloader mode SPI and GPIO signals provide an interface to either the SWD debug port of the K20 Additionally signal connections are available to i...

Страница 10: ...Device Class CDC interface that bridges serial communications between the USB host and this serial interface on the K20 5 3 K20D50M Microcontroller The target microcontroller of the FRDM K20D50M is t...

Страница 11: ...system intervention to complete programming and erase functions and full operation down to 1 71V FlexNVM adds up 32 KB for extra program code data or EEPROM backup Mixed signal capability High speed...

Страница 12: ...e UARTs one UART supports RS232 with flow control RS485 ISO7816 and IrDA while the other two UARTS support RS232 with flow control and RS485 One Inter IC Sound I2S serial interface for audio system in...

Страница 13: ...ode Please refer to section 5 2 Serial and Debug Adapter OpenSDA for more details 5 1 7 Debug The MK20DX128VLH5 supports JTAG and SWD debug interface however only SWD debug interface is available on F...

Страница 14: ...20D50M SCL PTB0 SDA PTB1 INT1 PTC11 INT2 PTC6 5 1 10 RGB LED Three PWM capable signals are connected to a red green blue LED D3 The signal connections are shown in Tabl 5 Table 5 RGB LED Signal Connec...

Страница 15: ...Visible light sensor The FRDM K20D50M has a visible light sensor that is connected to ADC0_DM0 5 1 1 Temperature sensor FRDM K20D50M is prepared for an external temperature sensor BD1020HFV TR connec...

Страница 16: ...Port A is referred to as PTA1 The I O connector pin names are given the same name as the K20 pin connected to it where applicable PTE1 2 1 PTD0 PTE0 4 3 PTC11 PTA5 6 5 PTC5 PTD4 8 7 PTC6 PTC8 10 9 PTC...

Страница 17: ...D50M are arranged to allow compatibility with peripheral boards known as shields that connect to Arduino and Arduino compatible microcontroller boards The outer rows of pins the even numbered pins on...

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