NXP Semiconductors Boundary Scan, Руководство пользователя

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Table 1. JTAG pin signal description
Signal name I/O type Description
TCK Input The test clock input provides the clock for the test logic.
TMS Input The value of the signal present at TMS at the time of a rising edge at TCK
determines the next state of the TAP controller.
TDI Input Serial test instructions and data are received by the test logic.
TDO Output Serial output for test instructions and data from the test logic.
TRST_N Input Optional active low signal to reset the TAP controller.
2 Installing software
The TRACE32 installation package can be found on the Lauterbach page .
Download the
TRACE32_201909.7z
to the computer and install it.
1. Because the installation package is relatively large, you can install software components according to the target
processor to save hard disk space.
2. You can find installed driver at
C:\T32\bin\windows64\drivers
.
3 Hardware connection diagram
The TRACE32 debugger hardware always consists of:
• Universal debugger hardware
• Debug cable specific to the processor architecture
Figure 2 is a schematic diagram of hardware connection.
NXP Semiconductors
Installing software
Introduction to Boundary Scan of i.MX RT Series, Rev. 1, March 2, 2021
Application Note 3 / 15