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ISD2360 Design Guide
Release Date: Nov 20, 2014
- 29 - Revision v1.14

In the associated VM, simply play a VP then power down.
See Figure 7-2 for detailed configuration information.
Figure 7-2 Sample_Project_1 Configuration
The following exlpains the POI VM:
CFG( REG2, 0x44)

write 0x44 into reg0x02; enable Decoder and PWM output path;
CFG( REG_GPIO_OE, 0x00)

write 0x00 into reg0x1A; configure all GPIO pins as input pins;
CFG( REG_GPIO_PE, 0x3F)

write 0x3F into reg0x1B; enable Pull-Enable for GPIO0-5;
CFG( REG_GPIO_PS, 0x3F)

write 0x3F into reg0x1D; enable Pull-High for GPIO0-5;
CFG( REG_GPIO_AF1, 0x3F)

write 0x3F into reg0x1E;
CFG( REG_GPIO_AF0, 0x00)

write 0x00 into reg0x1F; combined with reg0x1E to confiure GPIO0-5 as
falling edge triggering pins.
CFG(GPIO_TRIG_CH_SEL_L, 0x24)

write 0x24 into reg0x14, assign channel 0 to VM associated with GPIO0;
assign channel 1 to VM associated with GPIO1;
assign channel 2 to VM associated with GPIO2;
assign channel 0 to VM associated with GPIO3;
CFG( R0, 0x03)

write 0x03 into reg0x20; associate VM0x03 with GPIO0;
CFG( R1, 0x04)

write 0x04 into reg0x22; associate VM0x04 with GPIO1;
CFG( R2, 0x05)

write 0x05 into reg0x24; associate VM0x05 with GPIO2;
CFG( R3, 0x06)

write 0x06 into reg0x26; associate VM0x06 with GPIO3;
CFG( R4, 0x07)

write 0x07 into reg0x28; associate VM0x07 with GPIO4;
CFG( R5, 0x08)

write 0x08 into reg0x2A; associate VM0x08 with GPIO5;
PLAY(FastBeep)
 Play VP ―Fastbeep‖
PD

power down device (to save power).
In POI VM, configuration to the
Output Enable Control Register
,
Pull Select Control Register
and
Output Enable Control Register
can be omitted because of their POR (Power-On-Reset) default
values. Putting them there emphasizes that if button pressing pulls the GPIO pins low, then
the initial pin status needs to be configured as input, pull enabled and pulled high to ensure a
falling edge to be correctly generated.
Also note that since there is no assignment to the
GPIO Trigger Channel Select 2
register, the
default channel to be assigned to GPIO4 and GPIO5 is Channel 0.