CODEC Motherboard Manual Version 1.3
Page 4 of 66
April 12, 2016
CODEC Motherboard
6.8.2.1. REFIMP ............................................................................................. 29
6.8.2.2. FS (Frame Sync) ................................................................................ 30
6.8.2.3. Clock Prescalers ................................................................................ 30
6.8.2.4. Config PLL ......................................................................................... 30
6.8.3.
Digital Audio Control .............................................................................. 31
6.8.3.1. Clock Generation Control ................................................................... 31
6.8.3.1.1. CLKIOEN Master Mode ............................................................... 31
6.8.3.1.2. CLKM Master Clock ..................................................................... 32
6.8.3.1.3. BCLKSEL .................................................................................... 32
6.8.3.1.4. SMPLR Sample Rate ................................................................... 32
6.8.3.2. Companding Control .......................................................................... 32
6.8.3.2.1. PASSTHRU ................................................................................. 32
6.8.3.3. Audio Interface Control ....................................................................... 32
6.8.3.4. Jack Detect Bus Switching ................................................................. 32
6.9.
Output Path Control Panel ............................................................................. 33
6.10. Register Map Control Panel ........................................................................... 34
6.10.1.
Register Map Bit Control ........................................................................ 35
6.10.1.1.
Register Map Update Bits (write-only bits) ...................................... 35
6.10.2.
Audio Codec Register Control ................................................................ 35
6.11. Script Control Panel ....................................................................................... 36
6.11.1.
Script Panel Structure ............................................................................ 36
6.11.2.
Script Panel Syntax ................................................................................ 36
7.
Daughter Card System .......................................................................................... 38
7.1.
Changing Daughter Cards ............................................................................. 38
7.2.
NAU8822 Daughter Card ............................................................................... 38
8.
Jumpers and Connectors ....................................................................................... 40
8.1.
Power Related Connectors and Options ........................................................ 40
8.1.1.
Summary of Power Options and Limits .................................................. 41
8.1.2.
Main 5Vdc Power ................................................................................... 41
8.1.3.
Power LINK Jumpers ............................................................................. 42
8.2.
Analog Inputs for NAU8822 ........................................................................... 43
8.3.
Analog Outputs for NAU8822 ......................................................................... 44
8.3.1.
Analog Output Options for NAU8822 ...................................................... 45
8.3.1.1. Headphone Detect ............................................................................. 46
8.3.1.2. Headphone Virtual Ground ................................................................. 46
8.3.1.3. DC Coupled Headphone Outputs ....................................................... 46
8.3.1.4. Ear Speaker Mode ............................................................................. 46
