NuDAQ PCI-8554, Руководство пользователя

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Register Format
3.3 Timer/Counter Registers
The 8254 occupies 4 I/O address locations in PCI-8554 as shown
blow. Users can refer to Tundra's or Intel's data sheet for a full
description of the 8254 features. You can download the data sheet
for a full description of the 8254 features on the following web site:
“http://support.intel.com/support/controllers/peripheral/231164.htm ”
or http://www.tundra.com (for Tundra’s 82C54 datasheet.)
Address : BASE + 0x00 ~ BASE + 0x0F
Attribute:
read / write
Data Format:
Base + 0 Counter 1 Register ( R/W)
Base + 1 Counter 2 Register ( R/W)
Base + 2 Counter 3 Register ( R/W)
Base + 3 8254 Mode Control Register (W)
8254 Read Back Register (R)
Base + 4 Counter 4 Register ( R/W)
Base + 5 Counter 5 Register ( R/W)
Base + 6 Counter 6 Register ( R/W)
Base + 7 8254 Mode Control Register (W)
8254 Read Back Register (R)
Base + 8 Counter 7 Register ( R/W)
Base + 9 Counter 8 Register ( R/W)
Base + A Counter 9 Register ( R/W)
Base + B 8254 Mode Control Register (W)
8254 Read Back Register (R)
Base + C Counter 10 Register ( R/W)
Base + D Counter 11 Register ( R/W)
Base + E Counter 12 Register ( R/W)
Base + F 8254 Mode Control Register (W)
8254 Read Back Register (R)