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38 WAAS GUS Signal Generator User Guide Rev 1
Chapter 5 Messages
Table 34: Uplink Range Code Chip Sub-Phase Field
5.1.4.2 Uplink Range Code Chip Counter Field
This field contains the code count latched, within the current 1 ms epoch, upon detection of a 1PPS update pulse.
Table 35 shows the Uplink Range Code Counter field byte and bit order.
Table 35: Uplink Range Code Chip Counter Field
5.1.4.3 Uplink Range Symbol Counter Field
This field contains the symbol count latched, within the current 1 ms epoch, upon detection of a 1PPS update pulse.
At 500 SPS, the symbol counter epoch is 2 ms. At 1000 SPS, the symbol counter epoch is 1 ms.
Table 36 shows the
Uplink Range Symbol Counter field byte and bit order. If 500 SPS is selected, the MSB indicates which 1 ms epoch
is selected within the initial symbol epoch. A ‘0’ indicates that the even 1 ms epoch is latched within the initial 2 ms
symbol epoch. A ‘1’ indicates that the odd 1 ms epoch is latched within the 2 ms symbol epoch.
Table 36: Uplink Range Symbol Counter Field
5.1.4.4 Switch Status Fields
The Switch Status field contains the current state of all Signal Generator switches. The switch settings are polled
when the Status Message is created at the start of the current 1 second epoch.
Table 37 shows the Switch Status field
byte and bit order. Table 38 on Page 38 shows the Switch Status bit fields.
Table 37: Switch Status Field
Table 38: Switch Status Bit Fields
LS Byte [5] MS Byte [6]
D7 D6 D5 D4 D3 D2 D1 D0 D15 D14 D13 D12 D11 D10 D9 D8
LSB MSB
LS Byte [7] MS Byte [8]
D7 D6 D5 D4 D3 D2 D1 D0 D15 D14 D13 D12 D11 D10 D9 D8
LSB MSB
LS Byte [9] MS Byte [10]
D7 D6 D5 D4 D3 D2 D1 D0 D15 D14 D13 D12 D11 D10 D9 D8
LSB MSB
Byte [11]
D7 D6 D5 D4 D3 D2 D1 D0
MSB LSB
Bit Switch Status Description Range
D0 TX Inhibit
0 = Enable
1 = Disable