NHM–7
System Module & UI
PAMS Technical Documentation
Page 37
Issue 1 10/2001
Nokia Corporation
RC–filter in AFC control line to reduce the noise from the converter. Set-
tling time requirement for the RC–network comes from signalling, how
often PSW ( pure sine wave ) slots occur. They are repeated after 10
frames. AFC tracks base station frequency continuously, so transceiver
has a stable frequency, because changes in VCTCXO–output don’t occur
so fast ( temperature ).
Settling time requirement comes also from the start up–time allowed.
When transceiver is in sleep mode and ”wakes” up to receive mode ,
there is only about 5 ms for the AFC–voltage to settle. When the first
burst comes in system clock has to be settled into +/– 0.1 ppm frequency
accuracy. The VCTCXO–module requires also 5 ms to settle into final
frequency. Amplitude rises into full swing in 1 ... 2 ms, but frequency set-
tling time is higher so this oscillator must be powered up early enough.
DC–compensation
DC compensation is made during DCN1 and DCN2 operations (controlled
via serial bus). DCN1 is carried out by charging the large external capaci-
tors in AGC stages to a voltage which cause a zero dc–offset. DCN2 set
the signal offset to constant value (RXREF 1.35 V). The RXREF signal is
used as a zero level to RX ADCs.
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