8##4#
- E6
㨯
E5400 -
69
ASIC TEST
I
ASIC control signal
L : ASIC RESET
70
ADVREF ON
O
AD VREF ON/OFF signal
L : ON
71
BKUPCTL
O
Backup battery charge control
L: Charge
72
CLKSEL0
O
ARM system clock ON/OFF
H : ON
73
CLKSEL1
O
System clock selection
74
PLLSEL0
O
System clock selection
75
PLLEN
O
PLL oscillation ON/OFF
H : ON
76
VSS0
-
GND
77
VDD0
-
VDD
78
AF_LED
O
AF LED (Green)
L: ON
79
SB_LED
O
Speed light LED (Red)
L: ON
80
SELF_LED
O
Self LED (Red)
L: ON
81
PWR_LED
O
Power LED (Green)
L: ON
82
MAIN_RESET
O
ASIC reset
L: Reset
83
PICTL
O
Photo interrupter ON/OFF control
L : ON
84
F_ANA
O
PWM output for optical adjustment D/A
85
EXTSB_DET
O
External
fl
ash detection
L: External
fl
ash
86
CARD
I/O
Card detection
L: Card is used
87
ZAMUTE
O
AUDIO MUTE
L : MUTE
88
㨪
89 NC
O
-
90
PRG SCK
I
Serial clock output for
fl
ash rewriting
91
PRG SO
O
Serial data output for
fl
ash rewriting
92
PRG SI
O
Serial data input for
fl
ash rewriting
93
SCK
O
Serial clock output
㧔
→
ASIC
㧕
94
SO
O
Serial data output
㧔
→
ASIC
㧕
95
SI
I
Serial data input
㧔
←
ASIC
㧕
96
AVSS
-
Analog GND input terminal
97
㨪
100 SCAN IN6~3
I
Key matrix input
Table 3-1. 8-bit Microprocessor Port Speci
fi
cations
2. Setting of ASIC external port and communication
The SYA block carries out overall control of camera operation by detecting the input from the operation keys and
the condition of the camera circuits. The 8-bit microprocessor reads the signals from each sensor element as input
data and outputs this data to the camera circuits (ASIC) or to the LCD display device as operation mode setting data.
Fig. 3-1 shows the internal communication between the 8-bit microprocessor and ASIC.
8-bit microprocessor
ASIC
MRST
ZTEST
PLLEN
CLKSEL0
CLKSEL1
PLLSEL0
SI
SO
SCLK
SREQ
Setting of
external port
Communica-
tion
COMREG
Fig. 3-1 Internal Communication Bus Connection
