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Chapter 3
Hardware Overview
NI PXI-6682 User Manual
3-16
ni.com
•
Time for the receiver to recognize the signal
The source of an asynchronous routing operation on the NI PXI-6682 can
be any of the following lines:
•
Any front panel PFI pin (PFI<0..2>)
•
Any PXI Star trigger line (PXI_STAR<0..12>)
•
Any PXI Trigger line (PXI_TRIG<0..7>)
•
Synchronized time events
•
PXI_CLK10
•
Ground
The destination of an asynchronous routing operation on the NI PXI-6682
can be any of the following lines:
•
Any front panel PFI pin (PFI <0..2)
•
Any PXI star trigger line (PXI_STAR <0..12>)
•
Any PXI Trigger line (PXI_TRIG <0..7>)
Synchronous Routing
A synchronous routing operation is defined in terms of three signals: a
source, a destination, and a
synchronization clock
. A digital signal comes
in on the source and is propagated to the destination after the edge has been
realigned with the synchronization clock.
Unlike asynchronous routing, the output of a synchronous routing
operation does not directly follow the input after a propagation delay.
Instead, the output waits for the next rising edge of the clock before it
follows the input. Thus, the output is said to be “synchronous” with this
clock.
Synchronous routing can send triggers to several places in the same clock
cycle or send the trigger to those same places after a deterministic skew of
a known number of clock cycles. If a signal arrives at two chassis within
the same clock cycle, each NI PXI-6682 realigns the signal with the
synchronization clock and distributes it to the modules in each chassis at
the same time. Synchronous routing can thus remove uncertainty about
when triggers are received. If the delays through the system are such that
an asynchronous trigger might arrive near the edge of the receiver clock,
the receiver might see the signal in the first clock cycle, or it might see it in
the second clock cycle. However, by synchronizing the signal, you can
eliminate the ambiguity, and the signal will always be seen in the second
clock cycle.
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