Chapter 3
Hardware Overview
©
National Instruments Corporation
3-7
NI PXI-6682 User Manual
Table 3-5.
NI PXI-6682 I/O Terminals
Signal Name
Direction
Description
PXI_CLK10_IN
Out
This is a signal that can replace the native 10 MHz
oscillator on the PXI backplane. PXI_CLK10_IN
may originate from the onboard TCXO or from an
external source.
PXI_CLK10
In
This signal is the PXI 10 MHz backplane clock. By
default, this signal is the output of the native 10 MHz
oscillator in the chassis. An NI PXI-6682 in Slot 2
can replace this signal with PXI_CLK10_IN.
Oscillator
Out
This is the output of the 10 MHz TCXO. The TCXO
is a very stable and accurate frequency source.
CLKIN
In
CLKIN is a signal connected to the SMB input pin of
the same name. CLKIN can be routed to
PXI_CLK10_IN.
CLKOUT
Out
CLKOUT is the signal on the SMB output pin of the
same name. Either the TCXO clock or PXI_CLK10
may be routed to this location.
PXI_STAR <0..12>
In/Out
The PXI star trigger bus connects Slot 2 to
Slot <3..15> in a star configuration. The electrical
paths of each star line are closely matched to
minimize intermodule skew. An NI PXI-6682 in
Slot 2 can route signals to Slots <3..15> using the
star trigger bus.
PFI <0..2>
In/Out
The Programmable Function Interface pins on the
NI PXI-6682 route timing and triggering signals
between multiple PXI chassis. A wide variety of
input and output signals can be routed to or from the
PFI lines.
PFI<0> also can function as an input for IRIG-B DC
or AM.
PXI_TRIG <0..7>
In/Out
The PXI trigger bus consists of eight digital lines
shared among all slots in the PXI chassis. The
NI PXI-6682 can route a wide variety of signals to
and from these lines.
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