1-10 Technical Information
Table 1-4 SIMM Memory Upgrade Path
Total Memory
SIMM 1
SIMM 2
SIMM 3
SIMM 4
8 MB
4 MB
4 MB
Empty
Empty
16 MB
4 MB
4 MB
4 MB
4 MB
16 MB
8 MB
8 MB
Empty
Empty
24 MB
4 MB
4 MB
8 MB
8 MB
24 MB
8 MB
8 MB
4 MB
4 MB
32 MB
8 MB
8 MB
8 MB
8 MB
32 MB
16 MB
16 MB
Empty
Empty
40 MB
4 MB
4 MB
16 MB
16 MB
40 MB
16 MB
16 MB
4 MB
4 MB
48 MB
8 MB
8 MB
16 MB
16 MB
48 MB
16 MB
16 MB
8 MB
8 MB
64 MB
16 MB
16 MB
16 MB
16 MB
64 MB
32 MB
32 MB
Empty
Empty
72 MB
4 MB
4 MB
32 MB
32 MB
72 MB
32 MB
32 MB
4 MB
4 MB
80 MB
8 MB
8 MB
32 MB
32 MB
80 MB
32 MB
32 MB
8 MB
8 MB
96 MB
16 MB
16 MB
32 MB
32 MB
96 MB
32 MB
32 MB
16 MB
16 MB
128 MB
32 MB
32 MB
32 MB
32 MB
Interrupt Controller
The interrupt controller operates as an interrupt manager for the entire AT system
environment. The controller accepts requests from peripherals, issues interrupt requests to
the processor, resolves interrupt priorities, and provides vectors for the processor to
determine which interrupt routine to execute. The interrupt controller has priority
assignment modes that can be reconfigured at any time during system operations.
The interrupt levels are described in Table 1-5. Interrupt-level assignments 0 through 15 are
in order of decreasing priority. See Section 2, Setup and Operation, for information on
changing the interrupts using Setup.