Information S14769EJ1V0IF00
16
CHAPTER 3 UTOPIA INTERFACE
Q.3.1
When should the TCLAV signal be deasserted?
A.3.1
Deassert it between H2 (2
nd
byte of the cell header) and P44 (44
th
byte of the payload). Do not deassert it at H1.
T S O C
T x 7 t o T x 0
T x C L A V
T E N B L _ B
T C L K
5 8
5 7
5 6
5 5
5 4
5 3
5 2
5 1
5 0
5
4
3
2
1
H 2
P 4 5
P 4 4
X
X
H 1
X
X
P 4 8
P 4 7
P 4 6
Reference:
µ
PD98409 User’s Manual 4.3.1 (1) Transmit interface
Q.3.2
What is the phase difference (delay) between TCLK and RCLK?
A.3.2
The phase difference between TCLK and RCLK has not been formally established.
Reference:
µ
PD98409 User’s Manual 4.3.1 UTOPIA interface
Q.3.3
The clocks of UTOPIA (TCLK and RCLK) output the BUSCLK as is. Can any other clocks be used?
A.3.3
No.
Reference:
µ
PD98409 User’s Manual 4.3.1 UTOPIA interface
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