CHAPTER 12 SERIAL INTERFACE 20
User’s Manual U15075EJ1V0UM00
239
(c) Baud rate generator control register 20 (BRGC20)
BRGC20 is set with an 8-bit memory manipulation instruction.
RESET input sets BRGC20 to 00H.
TPS203
0
0
0
0
0
0
0
0
TPS202
0
0
0
0
1
1
1
1
f
X
/2
f
X
/2
2
f
X
/2
3
f
X
/2
4
f
X
/2
5
f
X
/2
6
f
X
/2
7
f
X
/2
8
(2.5 MHz)
(1.25 MHz)
(625 kHz)
(313 kHz)
(156 kHz)
(78.1 kHz)
(39.1 kHz)
(19.5 kHz)
TPS201
0
0
1
1
0
0
1
1
TPS200
0
1
0
1
0
1
0
1
n
1
2
3
4
5
6
7
8
Setting prohibited
3-bit counter source clock selection
Other than above
TPS203
TPS202
TPS201
TPS200
0
0
0
0
BRGC20
7
6
5
4
Symbol
Address
After reset
R/W
FF73H
00H
R/W
3
2
1
0
Cautions 1. When writing to BRGC20 during a communication operation, the baud rate
generator output is disrupted and communications cannot be performed normally.
Be sure not to write to BRGC20 during a communication operation.
2. Be sure not to select n = 1 during operation at f
X
= 5.0 MHz because the resulting
baud rate exceeds the rated range.
3. When the external input clock is selected, set port mode register 2 (PM2) to input
mode.
Remarks 1. f
X
:
Main system clock oscillation frequency
2. n:
Values determined by the settings of TPS200 to TPS203 (1
≤
n
≤
8)
3. The parenthesized values apply to operation at f
X
= 5.0 MHz.
If the internal clock is used as the serial clock for 3-wire serial I/O mode, set bits TPS200 to TPS203 to
set the frequency of the serial clock. To obtain the frequency to be set, use the following expression.
When an external clock is used, setting BRGC20 is not necessary.
Serial clock frequency = [Hz]
f
X
: Main system clock oscillation frequency
n: Values in the above table determined by the settings of TPS200 to TPS203 (1
≤
n
≤
8)
f
X
2
n + 1
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