NEC mPD784225 Series, Руководство пользователя

Страница: 483 / 581

483
CHAPTER 24 STANDBY FUNCTION
User’s Manual U12697EJ3V0UM
Table 24-5. Operating States in STOP Mode
STOP Mode Setting
With Subsystem Clock Without Subsystem Clock
Item
Clock generator Only main system clock stops oscillating.
CPU Operation disabled
Port (output latch) Holds the state before the STOP mode was set.
16-bit timer/counter Operational when the watch timer output is Operation disabled
selected as the count clock (Select f
XT
as
the count clock of the watch timer)
8-bit timer/counters 1, 2 Operational only when TI1 and TI2 are selected as the count clocks
8-bit timer/counters 5, 6 Operational only when TI5 and TI6 are selected as the count clocks
Watch timer Operational only when f
XT
is selected as Operation disabled
the count clock
Watchdog timer Operation disabled (initializing counter)
A/D converter Operation disabled
D/A converter Operation enabled
Real-time output port Operational when an external trigger is used or TI1 and TI2 are selected as the count
clocks of the 8-bit timer counters 1 and 2
Serial interface Except I
2
C bus Operational only when an external input clock is selected as the serial clock
mode
I
2
C bus mode Operation disabled
External interrupt INTP0 to INTP5 Operation enabled
Bus lines during AD0 to AD7 High impedance
external expansion A8 to A19
High impedance
ASTB High impedance
WR, RD High impedance
WAIT Holds input status
Caution In the STOP mode, only external interrupts (INTP0 to INTP5) and watch timer interrupts (INTWT)
can release the STOP mode and be acknowledged are pended, and acknowledged after the STOP
mode has been released through NMI input, INTP0 to INTP5 input or INTWT.