Evaluation Board of ML8088s Receiver
Operating Manual 2.0
26
«Logical 0», in this situation the «pull up» to the main power supply voltage should not be
present. Maximum allowed voltage on the module input pins during the main power V
dd
switched off should not exceed 0.2 V on all the pins, except of the pin 12 (V_RTC) and 18 (IN
/RST).
The pin 18 state (IN /RST) during the main power V
dd
switched off is not normalized.
Fig. 24. The timing chart for states and signal levels on the module pins during the
connection of Vbat.
At the time of pulse sending to IN /RST pin (or, in cases when this pulse is not formed, but
only the main voltage V
dd
is connected without the voltage +V
bat
), the high-impedance state
should be provided (Z-state or «IN» state) on lines, connected to pins TXD0 and TXD1. Note,
that the leaks through the lines, connected to the module not allowed. That leaks may include the
leaks through the «pull down» resistors or through the overvoltage protections circuits (in case of
protection voltage threshold lower , than V
dd
). Maximum leak current is 2 mkA. The breaking of
this rule leads to inability to launch module’s firmware. These states should be supported at least
20ms after sending low level to IN/RST or the main power supply V
dd
connection (in case of
V
bat
not used)
If the backup battery is not used, the pulse send to IN/RST is not obligatory.
Pulse for IN/RST may be send to restart the module firmware. It is strongly recommended
to provide forming IN/RST signal in the device. In case of output signals not present on the
module during 5…7 seconds, the IN/RST should be send to the module (with timing chart
compliance).
Antenna (active or passive ) is connected to 21 (RF IN) pin. The line, connecting pin 21
and antenna should be made with 50 Ohm impedance. The contacts 20 and 22 are the (AGND)
the part of high-frequency line to pin 21. the power supply to active antenna is provided through
the built-in lines.