background image

SP16160CH1RB Reference Design Board User’s Guide 

 

 

- 13 -  

www.national.com 

8.0 Device Configuration 

8.1 ADC16DV160 and LMH6517 Programming 

The 

ADC16DV160 

and 

LMH6517 

are 

both 

programmable  via  a  shared  serial  programming 
interface (SPI) bus that is accessible on the FutureBus 
connector. Writing to a device is handled with individual 
chip selects and is transparent to the user when using 
the WaveVision 5 capture platform and software. 

Registers are programmed via the Registers tab in the 
WaveVision  5  software  as  shown  in  Figure  13  and 
Figure  14.  After  the  reference  board  is  been  identified 
by the software, the Registers tab appears on the right-
hand  side  of  the  window.  Opening  the  tab  reveals 
options  for  modifying  the  individual registers with high-
level nomenclature. 

ADC Device Registers (Figure 13) 

 

Operation Mode

: Changes the operation of the 

ADC  from  normal  operation  to  sleep,  power-
down, or fixed pattern modes. 

 

Data Format

: Selects the output data format as 

Offset Binary or 2’s Complement. 

 

Full  Scale  Reference  Voltage

:  Varies  the 

reference  range  of  the  ADC  from  2.4  Vpp  to 
1.0 Vpp. 

 

Sample  Phase

:  Selects  the  sampling  edge  of 

the clock. 

 

Clock  Divider

:  Sets  the  internal  clock  to  be 

divided by 1 or 2. 

 

Output Clock Phase

: Varies the phase offset of 

the output data clock. 

LMH Device Registers (Figure 14) 

 

Ch. A/B Enable: 

Enables or disables the DVGA 

output stage. 

 

DVGA  A/B  Attenuation  (bits):

  Varies  the 

attenuation  of  the  ladder  attenuator  from  0  dB 
(value = 0) to 31.5 dB (value = 64). 

The  ADC16DV160  can  only  be  programmed  via  SPI 
but  the  LMH6517  can  operate  in  multiple  modes. 
These  modes  include  a  Serial  Mode  in  which  the 
device  is  programmed  via  SPI,  Parallel  Mode  in  which 
the gain of the DVGA is controlled by manual switches, 
and  Pulse  Mode.  The  SP16160CH1RB  is  factory 
configured  for  Serial  Mode  but  can  be  modified  to 
operate in Parallel Mode. Pulse Mode is not supported 
on  the  SP16160CH1RB.  Refer  to  the  Optional 
Configurations section for more information. 

 

8.2 LMK04031B Programming 

The  LMK04031B,  which  provides  the  sample  clock  for 
the  ADC,  must  be  configured  correctly  for  the  desired 
clock frequency. Programming can be accomplished by 
two methods. 

The first method is to attach a small PIC-based module 
that  is  included  in  this  evaluation  kit.  This  module  is 
plugged  onto  the  10-pin  uWire  header labeled “H3” as 
described  in  section  5.3  of  this  user’s  guide.    If  this 
module  is  used,  the  JP1  jumper  must  be  installed  to 
provide power from the main board to the PIC module.  
The PIC module will program the LMK04031B to output 
a 153.6 MHz single ended CMOS signal.  

The  second  method  for  programming  the  LMK04031B 
uses  the  10-pin  uWire  header  to  connect  the 
LMK04031B’s  serial  programming  interface  (DATA, 
CLK, LE) to a PC.  To use this programming interface, 
a special parallel port (LPT) cable supplied by National 
Semiconductor  allows  the  device  to  be  directly 

Figure 13:  ADC16DV160 Registers tab in 

the WaveVision 5 software (Default) 

Figure 14:  LMH6517 Registers tab in the 

WaveVision 5 software 

Max 
Attenuation 

Содержание ADC16DV160

Страница 1: ...B User s Guide 1 0 Reference Board Overview 2 2 0 Evaluation Kit Contents 4 3 0 System Description 4 4 0 Data Capture 5 5 0 Quick Start 5 6 0 Functional Description 7 7 0 System Performance 11 8 0 Dev...

Страница 2: ...160CH1RB board front side SMA_AMP_I In Phase Analog Input ADC 16DV160 VCXO 76 8 MHz Reference Crystal Oscillator 61 44 MHz LMK 04031B Low Noise Regulators H3 uWire Header LMH 6517 JP1 FutureBus Connec...

Страница 3: ...SP16160CH1RB Reference Design Board User s Guide 3 www national com Figure 2 SP16160CH1RB board back side Switching Regulators Varactor Controlled Crystal XO Optional...

Страница 4: ...ples per second analog to digital converter ADC with parallel LVDS outputs LMH6517 A high performance dual channel digitally controlled variable gain amplifier DVGA with a 31 5 dB gain range in 0 5 dB...

Страница 5: ...ition hardware through the FutureBus connector schematic reference designator H4 The SP16160CH1RB is compatible with National Semiconductor s WaveVision 5 1 Signal Path Digital Interface Board and ass...

Страница 6: ...hould have a jumper installed on the main board to provide power to the PIC microcontroller board Lastly flip the switches on the PIC microcontroller board to the following positions Switch 1 ON Switc...

Страница 7: ...e ADC input to full scale without compressing at the supply rails Ripple in the passband is easily kept below 1 dB The equivalent noise bandwidth ENBW of this filter is approximately 44 MHz Filter com...

Страница 8: ...trolled oscillator VCO and a distribution stage The first PLL locks an external voltage controlled crystal oscillator VCXO to an incoming reference clock and filters the phase noise of the reference T...

Страница 9: ...FutureBus connector on the edge of the reference board to the data capture hardware The data is clocked out of the ADC using the DRDY signal with a dual date rate DDR such that the even bits of both c...

Страница 10: ...201 Frequency MHz Magnitude dBFS Ch I Average 1dBFS Ch I Average 3dBFS Ch I Average 6dBFS Ch Q Average 1dBFS Ch Q Average 3dBFS Ch Q Average 6dBFS Figure 10 Typical SFDR performance vs input signal f...

Страница 11: ...iasing filter is 20 MHz considered here as the bandwidth with 0 5 dB ripple but the effective noise bandwidth is 44 MHz due to the gradual roll off of the filter profile Noise from the DVGA passes thr...

Страница 12: ...eference Design Board User s Guide 12 www national com a b IM3 H3 H2 Figure 12 Typical FFT plot for a a 192 MHz 1 dBFS input signal and b 194 MHz two tone composite signal with 1 MHz spacing and 7 dBF...

Страница 13: ...enuation of the ladder attenuator from 0 dB value 0 to 31 5 dB value 64 The ADC16DV160 can only be programmed via SPI but the LMH6517 can operate in multiple modes These modes include a Serial Mode in...

Страница 14: ...uencies may also require loop filter changes for optimal jitter performance In the default hardware configuration 153 6 MHz is the only possible clock frequency due to the narrowband SAW filter in the...

Страница 15: ...SP16160CH1RB Reference Design Board User s Guide 15 www national com Figure 16 LMK04031 CodeLoader configuration Bits Pins tab Figure 17 LMK04031B CodeLoader configuration PLL1 tab...

Страница 16: ...18 may result in degraded performance of the reference board Figure 19 LMK04031B CodeLoader configuration Clock Outputs tab The LMK04031B clock outputs are not easily accessible on the SP16160CH1RB r...

Страница 17: ...R7 located on the back side by the FutureBus Connector Figure 20 Orientation of the DIP switches that control the DVGA gain Part Sw Description 1 Latch active high 2 DVGA Enable active high 3 Gain 0...

Страница 18: ...t A lower cost solution is achieved for this reference board design with a varactor controlled crystal at the expense of lower noise performance at high input signal frequencies due to jitter This cir...

Страница 19: ...3 2 83 93 0 1 2 3 2 4 5 6 17 893 2 83 93 0 1 2 3 2 4 5 6 17 893 2 83 93 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2...

Страница 20: ...3 3 6 6 7 5 3 5 5 5 6 5 6 75 6 75 6 7 7 43 43 6 6 4 4 5 4 5 4 5 5 3 3 57 57 6 6 55 4 55 4 6 6 6 6 5 6 5 6 7 6 7 6 6 6 4 4 77 6 77 6 4 4 5 5 3 3 6 6 7 4 7 4 0 5 0 5 6 6 6 6 6 9 6 6 6 6 3 6 6 6 6 9 8 8...

Страница 21: ...1 893 2 2 3 93 0 1 2 3 2 4 5 6 17 A 1 B 1 893 2 2 3 93 0 1 2 3 2 4 5 6 17 A 1 B 1 893 2 2 3 93 2 2 D 3 03 D 3 03 2 E 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 D C D C 2 2 D 3 03 D 3 03 2 E 2 2 D D 2 2 2 2 12 2...

Страница 22: ...83 93 7 888888888888888888888888888888888888888888888888888888888888888 4 9 4 A 9 B A454 6 9 C D A454 1 1 7 3 3 8 0 1 3 E 1 3 3 0 F 0 0 0 3 2 2 F F 2 2 D F F F F 316 316 2 2 2 2 2 2 2 2 D D 2 2 2 2 2...

Страница 23: ...SP16160CH1RB Reference Design Board User s Guide 23 www national com 11 0 Layout Figure 27 Layer 1 Signal...

Страница 24: ...SP16160CH1RB Reference Design Board User s Guide 24 www national com Figure 28 Layer 2 Ground...

Страница 25: ...SP16160CH1RB Reference Design Board User s Guide 25 www national com Figure 29 Layer 3 Ground...

Страница 26: ...SP16160CH1RB Reference Design Board User s Guide 26 www national com Figure 30 Layer 4 Power...

Страница 27: ...SP16160CH1RB Reference Design Board User s Guide 27 www national com Figure 31 Layer 5 Ground...

Страница 28: ...SP16160CH1RB Reference Design Board User s Guide 28 www national com Figure 32 Layer 6 Signal...

Страница 29: ...Digi Key P10JCT ND 0 0810 10 0 81 30 2 R45 R50 24 9 RES 24 9 OHM 1 16W 1 0402 SMD smd_size0402 Panasonic ECG Digi Key P24 9LCT ND 0 0980 10 0 20 31 1 R171 49 9 RES 49 9 OHM 1 16W 1 0402 SMD smd_size0...

Страница 30: ...As used herein 1 Life support devices or systems are devices or systems which a are intended for surgical implant into the body or b support or sustain life and whose failure to perform when properly...

Страница 31: ...or use in safety critical applications such as life support where a failure of the TI product would reasonably be expected to cause severe personal injury or death unless officers of the parties have...

Страница 32: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Texas Instruments SP16160CH1RBKIT NOPB...

Отзывы: