National Semiconductor TPS65132S, Руководство пользователя

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Introduction
3 SLVUAY0 – November 2016
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Copyright © 2016, Texas Instruments Incorporated
TPS65132S Evaluation Module
1.3 Features
• Efficiency greater than 85% at I
O
> 10 mA
• Input voltage range of 2.5 V to 5.5 V
• Positive output voltage range of 4.0 V to 6.0 V (0.1-V steps)
• Negative output voltage range of –4.0 V to –6.0 V (0.1-V steps)
• Output voltage accuracy of better than 1%
• Programmable active discharge during shutdown
• Programmable power-up and power-down sequencing
• Excellent line regulation
• Advanced power-save mode for light-load efficiency
• Thermal shutdown
• Four-layer PCB with all components on top side
2 Electrical Specifications
Table 1 gives an overview of the electrical specifications of the TPS65132S EVM.
(1)
I
O
means that the load is connected from V
POS
to V
NEG
.
Table 1. Electrical Specifications
Parameter Notes and Conditions MIN TYP MAX Unit
Input Characteristics
V
IN
Input voltage 2.5 5.5 V
Input current V
IN
= 3.7 V, I
POS
= I
NEG
= 150 mA 275 mA
V
IN
= 3.7 V, I
POS
= I
NEG
= 0 mA 0.1 2 mA
Output Characteristics
V
POS
Default positive output voltage V
IN
= 3.7 V, I
POS
= 150 mA 5.35 5.4 5.45 V
Δ V
POS( Δ VIN)
Line regulation (V
POS
) V
IN
= 2.5 V to 5.5 V, I
POS
= 150 mA 5 mV
Δ V
POS( Δ IO)
Load regulation (V
POS
) I
POS
= 10 mA to 150 mA, V
I
= 3.7 V –16 mV
V
POS(PP)
Output voltage ripple (V
POS
) V
IN
= 3.7 V, I
O
= 150 mA
(1)
5 mV
V
NEG
Default negative output
voltage V
IN
= 3.7 V, I
NEG
= 150 mA –5.45 –5.4 –5.35 V
Δ V
NEG( Δ VIN)
Line regulation (V
NEG
) V
IN
= 2.5 V to 5.5 V, I
O
= 150 mA
(1)
9 mV
Δ V
NEG(
Δ
IO)
Load regulation (V
NEG
) I
NEG
= 10 mA to 150 mA, V
IN
= 3.7 V –88 mV
V
NEG(PP)
Output voltage ripple NEG V
IN
= 3.7 V, I
O
= 150 mA
(1)
50 mV
System Characteristics
Switching frequency 1.6 MHz
Peak efficiency V
IN
= 3.7 V 89%