L M K 0 3 0 0 2 C
E V A L U A T I O N B O A R D O P E R A T I N G I N S T R U C T I O N S
9
Features of the board
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Either one of two loop filters can be selected by shorting either R22 or R5. More info
about each loop filter can be found in the General Description and Appendix A.
•
Test points for each of the uWire lines are scattered in the lower left corner of the board
and include: GOE_TP, DATAuWire, CLKuWire, LEuWire, SYNC_TP, and LD_TP.
•
Ground is located on the unstuffed 10 pin header on the left side of the board.
•
Ground is located on the GND_tp2 in the upper left corner of the board and GND_tp1
located to the right of the Vcc SMA connector.
•
Ground is located on the bottom side of the board on each pad of the unstuffed 10 pin
header GND_J2.
•
Vcc is located on the unstuffed 10 pin header on the upper left side of the board.
•
Vcc is located on VccPlane test point located to the right of the Vcc SMA.
•
Vcc is located on the bottom side of the board on each pad of the unstuffed 10 pin
header VCC_J2
Other Important Notes
•
When changing the OSCin frequency, the OSCin frequency register needs to be changed
to match.
•
Toggle the SYNC* pin to synchronize the clock outputs when in divided mode.
•
For both loop filters, a helper silkscreen is offset from the loop filters to help identify the
components according to National Semiconductor’s traditional reference designators
associated with loop filters.
•
The LMK0300xC PCB works for many LMK0300xC devices. Because of this the
silkscreen on the board is different from actual clock outputs in the datasheet and in
CodeLoader. Refer to the table below for the correct mapping.
Datasheet / CodeLoader
LMK0300xC EVB PCB
CLKout0 / CLKout0*
CLKout4 / CLKout4*
CLKout1 / CLKout1*
CLKout5 / CLKout5*
CLKout2 / CLKout2*
CLKout6 / CLKout6*
CLKout3 / CLKout3*
CLKout7 / CLKout7*