Chapter 4
Analog Input
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National Instruments Corporation
4-17
Other Timing Requirements
Your DAQ device only acquires data during an acquisition. The device
ignores ai/SampleClock when a measurement acquisition is not in progress.
During a measurement acquisition, you can cause your DAQ device to
ignore ai/SampleClock using the ai/PauseTrigger signal.
A counter on your device internally generates ai/SampleClock unless you
select some external source. ai/StartTrigger starts this counter and either
software or hardware can stop it after a finite acquisition completes. When
using an internally generated ai/SampleClock, you also can specify a
configurable delay from ai/StartTrigger to the first ai/SampleClock pulse.
By default, this delay is set to two ticks of the ai/SampleClockTimebase
signal. When using an externally generated ai/SampleClock, you must
ensure the clock signal is consistent with respect to the timing requirements
of ai/ConvertClock. Failure to do so may result in ai/SampleClock pulses
that are masked off and acquisitions with erratic sampling intervals. Refer
to the
section for more information on the timing
requirements between ai/ConvertClock and ai/SampleClock.
Figure 4-11 shows the relationship of ai/SampleClock to ai/StartTrigger.
Figure 4-11.
ai/SampleClock and ai/StartTrigger
AI Sample Clock Timebase Signal
You can route any of the following signals to be the AI Sample Clock
Timebase (ai/SampleClockTimebase) signal:
•
20 MHz Timebase
•
100 kHz Timebase
•
PXI_CLK10
ai/SampleClockTimebase
ai/StartTrigger
ai/SampleClock
Delay
From
Start
Trigger
Содержание PCI-6238
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