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Chapter 3

Hardware Overview

National Instruments Corporation

3-5

NI PCI-6110/6111 User Manual

Figure 3-3.

Analog Trigger Block Diagram for the NI PCI-6110

Figure 3-4.

Analog Trigger Block Diagram for the NI PCI-6111

Five analog triggering modes are available, as shown in Figures 3-5
through 3-9. You can independently set

lowValue

and

highValue

software.

PFI0/TRIG1

PGIA

Analog

Input

CH0

–

ADC

DAQ-STC

Analog
Trigger
Circuit

Mux

PGIA

Analog

Input

CH1

–

PGIA

Analog

Input

CH2

–

PGIA

Analog

Input

CH3

–

ADC

PFI0/TRIG1

PGIA

Analog

Input

CH0

–

ADC

DAQ-STC

Analog
Trigger
Circuit

Mux

PGIA

Analog

Input

CH1

–

ADC

Содержание NI PCI-6110

Страница 1: ...DAQ NI PCI 6110 6111 User Manual Mulitfunction I O Devices for PCI Bus Computers NI PCI 6110 6111 User Manual July 2003 Edition Part Number 321759E 01...

Страница 2: ...France 01 48 14 24 24 Germany 089 741 31 30 Greece 30 1 42 96 427 Hong Kong 2645 3186 India 91 80 4190000 Israel 03 6393737 Italy 02 413091 Japan 03 5472 2970 Korea 02 3451 3400 Malaysia 603 9596711...

Страница 3: ...maintenance instructions owner s modification of the product owner s abuse misuse or negligent acts and power failure or surges fire flood accident actions of third parties or other events outside re...

Страница 4: ...Class A Federal Communications Commission This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to part 15 of the FCC Rules These limits are designe...

Страница 5: ...ptional Equipment 1 4 Custom Cabling 1 4 Unpacking 1 5 Safety Information 1 5 Chapter 2 Installing and Configuring the NI PCI 6110 6111 Installing the Software 2 1 Installing the Hardware 2 1 Configur...

Страница 6: ...ion Considerations 4 12 Working Voltage Range 4 13 Analog Output Signal Connections 4 14 Digital I O Signal Connections 4 15 Power Connections 4 16 Timing Connections 4 16 Programmable Function Input...

Страница 7: ...35 FREQ_OUT Signal 4 37 Field Wiring Considerations 4 37 Chapter 5 Calibration Loading Calibration Constants 5 1 Self Calibration 5 2 External Calibration 5 2 Appendix A Specifications Appendix B Cabl...

Страница 8: ...up item and select Options from the last dialog box This icon denotes a note which alerts you to important information This icon denotes a caution which advises you of precautions to take to avoid inj...

Страница 9: ...following documents Accessory installation guides or manuals If you use accessory products read the terminal block and cable assembly installation guides They explain how to physically connect the rel...

Страница 10: ...ed at ni com zone PCI Local Bus Specification Revision 2 2 DAQ Quick Start Guide located at ni com manuals DAQ STC Technical Reference Manual located at ni com manuals NI DAQ User Manual for PC Compat...

Страница 11: ...s made possible by the NI MITE bus interface chip that connects the device to the PCI I O bus The MITE implements the PCI Local Bus Specification so that the interrupts and base memory addresses are a...

Страница 12: ...cation development environment ADE software or other ADEs In either case you use NI DAQ NI DAQ NI DAQ which ships with the NI PCI 6110 6111 has an extensive library of functions that you can call from...

Страница 13: ...udio which includes LabWindows CVI tools for Visual C and tools for Visual Basic is a development suite that allows you to use ANSI C Visual C and Visual Basic to design test and measurement software...

Страница 14: ...llowing cables connector blocks and other accessories Shielded cables and cable assemblies Connector blocks shielded 50 and 68 pin screw terminals RTSI bus cables For more specific information about t...

Страница 15: ...package Remove the device from the package and inspect the device for loose components or any sign of damage Notify NI if the device appears damaged in any way Do not install a damaged device into th...

Страница 16: ...re returning it to service You must insulate signal connections for the maximum voltage for which the product is rated Do not exceed the maximum ratings for the product Remove power from signal lines...

Страница 17: ...y III include measurements on distribution circuits and circuit breakers Other examples of Installation Category III are wiring including cables bus bars junction boxes switches socket outlets in the...

Страница 18: ...Consult the computer or chassis user manual or technical reference manual for specific instructions and warnings about installing new devices You can install the NI PCI 6110 6111 in any available expa...

Страница 19: ...must perform two types of configuration on the NI PCI 6110 6111 bus related and data acquisition related configuration The NI PCI 6110 6111 is fully compatible with the industry standard PCI Local Bu...

Страница 20: ...libration DACs DAC0 DAC1 CH0 12 Bit ADC DAQ STC Analog Input Timing Control Analog Output Timing Control Digital I O Trigger Counter Timing I O RTSI Bus Interface DMA IRQ Bus Interface Data 32 Address...

Страница 21: ...than ground A channel configured in DIFF input mode uses two AI channel lines One line connects to the positive input of the device programmable gain instrumentation amplifier PGIA and the other conne...

Страница 22: ...can use the full resolution of the ADC to measure the input signal Table 3 1 shows the overall input range and precision according to the chosen gain Table 3 1 Actual Range and Measurement Precision R...

Страница 23: ...annels of AO voltage at the I O connector The range is fixed at bipolar 10 V Analog Trigger In addition to supporting internal software triggering and external digital triggering to initiate a DAQ seq...

Страница 24: ...NI PCI 6111 Five analog triggering modes are available as shown in Figures 3 5 through 3 9 You can independently set lowValue and highValue in software PFI0 TRIG1 PGIA Analog Input CH0 ADC ADC ADC DA...

Страница 25: ...elow Low Level Analog Triggering Mode In above high level analog triggering mode the trigger is generated when the signal value is greater than highValue as shown in Figure 3 6 LowValue is unused Figu...

Страница 26: ...er than highValue with the hysteresis specified by lowValue as shown in Figure 3 8 Figure 3 8 High Hysteresis Analog Triggering Mode In low hysteresis analog triggering mode the trigger is generated w...

Страница 27: ...r general purpose counters 0 and 1 are connected onboard to DIO6 and DIO7 respectively Thus you can use DIO6 and DIO7 to control those counters The up down control signals GPCTR0_UP_DOWN and GPCTR1_UP...

Страница 28: ...umber of sources including the external signals RTSI 0 6 and PFI 0 9 and the internal signals Sample Interval Counter TC and GPCTR0_OUT Many of these timing signals are also available as outputs on th...

Страница 29: ...can turn on the output driver for the PFI5 UPDATE pin Device and RTSI Clocks Many functions performed by the NI PCI 6110 6111 require a frequency timebase to generate the necessary timing signals for...

Страница 30: ...ls onto the RTSI bus and can receive any of these timing signals This signal connection scheme is shown in Figure 3 11 Figure 3 11 RTSI Bus Signal Connection Refer to the Timing Connections section of...

Страница 31: ...outs Figure 4 2 shows the pin assignments for the NI PCI 6110 6111 when used with a 50 pin accessory Caution Connections that exceed any of the maximum ratings of input or output signals on the NI PCI...

Страница 32: ...NC ACH3GND1 ACH3 1 ACH2 1 ACH1GND ACH1 ACH0 DGND 1 NC on NI PCI 6111 NC No Connect PFI8 GPCTR0_SOURCE PFI7 STARTSCAN GPCTR1_OUT PFI4 GPCTR1_GATE PFI3 GPCTR1_SOURCE PFI2 CONVERT DGND DGND DGND EXTSTRO...

Страница 33: ...Analog Input Channels 0 through 3 These pins are routed to the terminal of the respective channel amplifier ACH 2 3 signals are no connects on the NI PCI 6111 DIO1 1 NC on NI PCI 6111 DIO3 DIO4 DIO6 D...

Страница 34: ...ed The low to high edge indicates when the input signal can be removed from the input or switched to another signal EXTSTROBE DGND Output External Strobe This output can be toggled under software cont...

Страница 35: ...e UPDATE signal A high to low edge on UPDATE indicates that the AO primary group is being updated PFI6 WFTRIG DGND Input Output PFI6 Waveform Trigger As an input this is a PFI As an output this is the...

Страница 36: ...th 10 pF2 42 V ACH 0 3 AI 10 nF 42 V 200 pA ACH 0 3 GND AI DAC0OUT AO 50 Short circuit to ground 5 at 10 5 at 10 300 V s DAC1OUT AO 50 Short circuit to ground 5 at 10 5 at 10 300 V s AOGND AO DGND DO...

Страница 37: ...c 0 5 3 5 at Vcc 0 4 5 at 0 4 1 5 50 k pu PFI9 GPCTR0_GATE DIO Vcc 0 5 3 5 at Vcc 0 4 5 at 0 4 1 5 50 k pu GPCTR0_OUT DO 3 5 at Vcc 0 4 5 at 0 4 1 5 50 k pu FREQ_OUT DO 3 5 at Vcc 0 4 5 at 0 4 1 5 50...

Страница 38: ...m ground Pseudodifferential signal connections reduce noise pickup and increase common mode noise rejection This connection type also allows input signals to float within the common mode limits of the...

Страница 39: ...ces optical isolator outputs and isolation amplifiers An instrument or device that has an isolated output is a floating signal source You must tie the ground reference of a floating signal to the NI P...

Страница 40: ...signal is tied to the positive input of the PGIA and its reference signal or return is tied to the negative input of the PGIA Each differential signal uses two inputs one for the signal and one for i...

Страница 41: ...111 Figure 4 4 Differential Input Connections for Ground Referenced Signals With this type of connection the PGIA rejects both the common mode noise in the signal and the ground potential difference b...

Страница 42: ...turates causing erroneous readings You must reference the source to the respective channel ground Common Mode Signal Rejection Considerations Figure 4 4 shows connections for signal sources that are a...

Страница 43: ...ls of interest while rejecting common mode signals as long as the following three conditions are met 1 The common mode voltage Vcm which is equivalent to subtracting ACH 0 3 GND from ACH 0 3 and which...

Страница 44: ...oltage output signal for AO channel 0 DAC1OUT is the voltage output signal for AO channel 1 and AOGND is the ground reference signal for the AO channels Figure 4 6 shows how to make AO connections to...

Страница 45: ...IO port You can program all lines individually to be inputs or outputs Caution Exceeding the maximum input voltage ratings which are listed in Table 4 3 can damage the NI PCI 6110 6111 and the compute...

Страница 46: ...n damage the device and the computer NI is not liable for damage resulting from such a connection Timing Connections Caution Exceeding the maximum input voltage ratings which are listed in Table 4 3 c...

Страница 47: ...source for each signal is software selectable from any PFI when you want external control This flexible routing scheme reduces the need to change the physical wiring to the device I O connector for ap...

Страница 48: ...s The DAQ timing signals are TRIG1 TRIG2 STARTSCAN CONVERT AIGATE SISOURCE SCANCLK and EXTSTROBE Posttriggered data acquisition allows you to view only data that is acquired after a trigger event is r...

Страница 49: ...for TRIG1 and configure the polarity selection for either rising or falling edge The selected edge of the TRIG1 starts the DAQ sequence for both posttriggered and pretriggered acquisitions The NI PCI...

Страница 50: ...n Refer to Figure 4 10 for the relationship of TRIG2 to the DAQ sequence As an input TRIG2 is configured in the edge detection mode You can select any PFI pin as the source for TRIG2 and configure the...

Страница 51: ...posttrigger in a pretriggered acquisition sequence even if another PFI is externally triggering the acquisition TRIG2 is not used in posttriggered data acquisition The output is an active high pulse w...

Страница 52: ...you select internally triggered CONVERT As an output STARTSCAN reflects the actual start pulse that initiates a scan even if another PFI is externally triggering the starts You have two output option...

Страница 53: ...er is started by the TRIG1 signal and is stopped by either software or the SC Scans generated by either an internal or external STARTSCAN signal are inhibited unless they occur within a DAQ sequence S...

Страница 54: ...nship of CONVERT to the DAQ sequence As an input CONVERT is configured in the edge detection mode You can select any PFI pin as the source for CONVERT and configure the polarity selection for either r...

Страница 55: ...E signal or software command register gate AIGATE Signal Any PFI pin can receive as an input the AIGATE signal which is not available as an output on the I O connector The AIGATE signal can mask off s...

Страница 56: ...ncy limitation Either the 20 MHz or 100 kHz internal timebase generates SISOURCE unless you select some external source Figure 4 19 shows the timing requirements for SISOURCE Figure 4 19 SISOURCE Sign...

Страница 57: ...als or to trigger events In the single pulse mode software controls the level of EXTSTROBE A 10 s and a 1 2 s clock are available for generating a sequence of eight pulses in the hardware strobe mode...

Страница 58: ...e waveform generation for the DACs The update interval counter UI is started if you select internally generated UPDATE As an output WFTRIG reflects the trigger that initiates waveform generation even...

Страница 59: ...E you must set the DACs to posted update mode As an output UPDATE reflects the actual update pulse that is connected to the DACs even if the updates are being externally generated by another PFI The o...

Страница 60: ...gnal You must configure the PFI pin you select as the source for UISOURCE in the level detection mode You can configure the polarity selection for the PFI pin for either active high or active low Figu...

Страница 61: ...equirements for GPCTR0_SOURCE Figure 4 27 GPCTR0_SOURCE Signal Timing The maximum allowed frequency is 20 MHz with a minimum pulse width of 10 ns high or low There is no minimum frequency limitation T...

Страница 62: ...g GPCTR0_OUT Signal This signal is available only as an output on the GPCTR0_OUT pin The GPCTR0_OUT signal reflects the terminal count TC of general purpose counter 0 You have two software selectable...

Страница 63: ..._SOURCE pin As an input GPCTR1_SOURCE is configured in the edge detection mode You can select any PFI pin as the source for GPCTR1_SOURCE and configure the polarity selection for either rising or fall...

Страница 64: ...r falling edge You can use the gate signal in a variety of different applications to perform such actions as starting and stopping the counter generating interrupts saving the counter contents and so...

Страница 65: ...hows the timing requirements for GPCTR1_OUT Figure 4 32 GPCTR1_OUT Signal Timing GPCTR1_UP_DOWN Signal This signal can be externally input on the DIO7 pin and is not available as an output on the I O...

Страница 66: ...urce signal The gate must be valid either high or low for at least 10 ns before the rising or falling edge of a source signal for the gate to take effect at that source edge as shown by tgsu and tgh i...

Страница 67: ...r care when running signal wires between signal sources and the device The following recommendations apply mainly to AI signal routing to the device although they also apply to signal routing in gener...

Страница 68: ...ther Do not run signal lines through conduits that also contain power lines Protect signal lines from magnetic fields caused by electric motors welding equipment breakers or transformers by running th...

Страница 69: ...onstants The NI PCI 6110 6111 is factory calibrated before shipment at approximately 25 C to the levels indicated in Appendix A Specifications The associated calibration constants the values that were...

Страница 70: ...CI 6110 6111 has an onboard calibration reference to ensure the accuracy of self calibration The specifications are listed in Appendix A Specifications The reference voltage is measured at the factory...

Страница 71: ...6111 2 pseudodifferential Type of ADC Resolution 12 bits 1 in 4 096 Pipeline 3 Sampling rate Maximum 5 MS s Minimum 1 kS s Input coupling DC or AC Max working voltage for all AI channels Overvoltage p...

Страница 72: ...le 24 Hours 90 Days 1 Year Single Pt Averaged C Theoretical Averaged 42 0 51 0 51 0 51 35 51 4 4 0 0005 24 5 8 20 0 51 0 51 0 51 20 20 1 8 0 0005 9 8 2 3 10 0 11 0 11 0 11 5 7 10 0 88 0 0005 4 9 1 2 5...

Страница 73: ...10 nF Input bias current 300 pA Input offset current 200 pA CMRR Refer to Table A 2 Dynamic Characteristics Interchannel skew 1 ns typ fin 100 kHz input range 10 V Bandwidth Note Bandwidth specificati...

Страница 74: ...re coefficient 2 0 ppm C max Long term stability 6 ppm Table A 2 Analog Input Characteristics Input Range Bandwidth1 MHz SFDR Typ2 dB SFDR Max dB CMRR3 dB System Noise4 LSBrms 42 V 5 5 78 70 34 0 5 20...

Страница 75: ...modes Scatter gather single transfer demand transfer Transfer Characteristics Relative accuracy INL 4 LSB typ 8 LSB max DNL 2 LSB typ 8 LSB max Voltage Output Ranges 10 V Output coupling DC Output im...

Страница 76: ...5 MHz Spurious free dynamic range 75 dB DC to 10 kHz Glitch energy 30 mV for 1 s Stability Offset temperature coefficient 500 V C Gain temperature coefficient Internal reference 50 ppm C External refe...

Страница 77: ...s Base clocks available 20 MHz 100 kHz Base clock accuracy 0 01 Max source frequency 20 MHz Level Min Max Input low voltage Input high voltage Input low current Vin 0 V Input high current Vin 5 V 0 0...

Страница 78: ...olution 4 bits 1 in 16 Compatibility TTL CMOS Digital logic levels Base clocks available 10 MHz 100 kHz Base clock accuracy 0 01 Data transfers DMA interrupts programmed I O Triggers Analog Trigger Nu...

Страница 79: ...ammable Bandwidth 3 dB Internal source ACH 0 3 5 MHz External source PFI0 TRIG1 5 MHz Digital Trigger Purpose Analog input Start and stop trigger gate clock Analog output Start trigger gate clock Gene...

Страница 80: ...uirement 5 VDC 5 NI PCI 6110 2 5 A NI PCI 6111 2 0 A Power available at I O connector 4 65 to 5 25 VDC at 1 A Physical Dimensions not including connectors 31 2 by 10 6 cm 12 3 by 4 2 in I O connector...

Страница 81: ...ts of the following standards of safety for electrical equipment for measurement control and laboratory use IEC 61010 1 EN 61010 1 UL 3111 1 UL 61010B 1 CAN CSA C22 2 No 1010 1 Note For UL and other s...

Страница 82: ...ity Directive EMC 89 336 EEC Note Refer to the Declaration of Conformity DoC for this product for any additional regulatory compliance information To obtain the DoC for this product click Declarations...

Страница 83: ...es the cable connectors on the NI PCI 6110 6111 Figure B 1 shows the pin assignments for the 68 pin NI PCI 6110 6111 connector This connector is available when you use the SH6868EP cable assemblies wi...

Страница 84: ...NC NC NC NC NC ACH3GND1 ACH3 1 ACH2 1 ACH1GND ACH1 ACH0 DGND 1 NC on NI PCI 6111 PFI8 GPCTR0_SOURCE PFI7 STARTSCAN GPCTR1_OUT PFI4 GPCTR1_GATE PFI3 GPCTR1_SOURCE PFI2 CONVERT DGND DGND DGND EXTSTROBE...

Страница 85: ...PFI0 TRIG1 PFI1 TRIG2 PFI2 CONVERT PFI3 GPCTR1_SOURCE PFI4 GPCTR1_GATE GPCTR1_OUT PFI5 UPDATE PFI6 WFTRIG PFI7 STARTSCAN PFI8 GPCTR0_SOURCE PFI9 GPCTR0_GATE GPCTR0_OUT FREQ_OUT ACH 0 3 GND ACH 0 3 GND...

Страница 86: ...d into the following three groups AI two 24 bit two 16 bit counters AO three 24 bit one 16 bit counters General purpose counter timer functions two 24 bit counters The groups can be configured indepen...

Страница 87: ...lly through the PCI bus protocol This assignment is completely transparent to you What jumpers should I be aware of when configuring the NI PCI 6110 6111 The NI PCI 6110 6111 is jumperless and switchl...

Страница 88: ...ecting Signals I m using the DACs to generate a waveform but I discovered with a digital oscilloscope that there are glitches on the output signal Is this normal When it switches from one voltage to a...

Страница 89: ...0 6111 Hardware digital and analog triggering are both supported on the NI PCI 6110 6111 What added functionality does the DAQ STC make possible in contrast to the Am9513 The DAQ STC incorporates much...

Страница 90: ...one of the general purpose counter timers on the NI PCI 6110 6111 but I do not see the counter timer output on the I O connector What am I doing wrong If you are using NI DAQ or LabWindows CVI you mu...

Страница 91: ...in Table 4 3 I O Signal Summary for the NI PCI 6110 6111 These resistors weakly pull the output to either a logic high or logic low state For example DIO 0 is in the high impedance state after power o...

Страница 92: ...asurement glossary and so on Assisted Support Options Contact NI engineers and other measurement and automation professionals by visiting ni com support Our online system helps you define your questio...

Страница 93: ...ou need contact your local office or NI corporate headquarters Phone numbers for our worldwide offices are listed at the front of this manual You also can visit the Worldwide Offices section of ni com...

Страница 94: ...ymbol Prefix Value p pico 10 12 n nano 10 9 micro 10 6 m milli 10 3 k kilo 103 M mega 106 G giga 109 T tera 1012 Numbers Symbols degrees greater than greater than or equal to less than less than or eq...

Страница 95: ...converts an analog voltage to a digital number ADE application development environment AI analog input AIGATE analog input gate signal AIGND analog input ground signal ANSI American National Standards...

Страница 96: ...sed in decibels dB common mode noise unwanted signals that appear in equal phase and amplitude on both the inverting and noninverting input in a differential measurement system Ideally but not complet...

Страница 97: ...s of a general A D and D A system dB decibel the unit for expressing a logarithmic measure of the ratio of two signal levels dB 20log10 V1 V2 for signals in volts DC direct current DGND digital ground...

Страница 98: ...mechanical compliance ENOB effective number of bits a measure of the actual performance of an A D converter after its various noise sources and nonlinearities are included The ENOB is computed as the...

Страница 99: ...ffect of latencies associated with getting the data from system memory to the DAQ device floating signal sources signal sources with voltage signals that are not connected to an absolute reference or...

Страница 100: ...transfer function from a straight line interchannel delay amount of time that passes between sampling consecutive channels The interchannel delay must be short enough to allow sampling of all the chan...

Страница 101: ...ules so that only the object modules that are relevant to your application are linked in while those object modules that are not relevant are not linked linearity the adherence of device response to t...

Страница 102: ...s generators transformers fluorescent lights CRT displays computers electrical storms welders radio transmitters and internal sources such as semiconductors resistors and capacitors Noise corrupts sig...

Страница 103: ...ht lines of digital input and or output posttriggering the technique used on a DAQ device to acquire a programmed number of samples after trigger conditions are met potentiometer an electrical device...

Страница 104: ...full scale For example a system has 12 bit resolution one part in 4 096 resolution and 0 0244 of full scale RH relative humidity rms root mean square RTD resistive temperature detector a metallic prob...

Страница 105: ...eflection to the highest spurious signal in the frequency domain SI2 sample interval counter signal conditioning the manipulation of signals to prepare them for digitizing SISOURCE SI counter clock si...

Страница 106: ...t that causes or starts some form of data capture tsc source clock period tsp source pulse width TTL transistor transistor logic tw pulse width U UI update interval counter UISOURCE update interval co...

Страница 107: ...m VIH volts input high VIL volts input low Vin volts in Vm measured voltage VOH volts output high VOL volts output low Vref reference voltage Vrms volts root mean square Vs ground referenced signal so...

Страница 108: ...e signal rejection 4 12 description table 4 3 differential connections ground referenced signal sources figure 4 11 nonreferenced or floating signal sources figure 4 12 signal summary table 4 6 specif...

Страница 109: ...e triggering note 3 4 B below low level analog triggering mode 3 6 bipolar input 3 3 block diagrams NI PCI 6110 3 1 analog trigger 3 5 NI PCI 6111 3 2 analog trigger 3 5 bus interface specifications A...

Страница 110: ...r overview 1 1 questions about C 4 DAQ STC See DAQ STC system timing controller data acquisition timing connections See DAQ timing connections DC input coupling 3 4 Declaration of Conformity D 1 devic...

Страница 111: ...self resetting 4 16 C 2 G general purpose timing signal connections FREQ_OUT signal 4 37 GPCTR0_GATE signal 4 31 GPCTR0_OUT signal 4 32 GPCTR0_SOURCE signal 4 31 GPCTR0_UP_DOWN signal 4 33 GPCTR1_GAT...

Страница 112: ...4 analog output 3 4 analog trigger block diagram 3 5 overview 3 4 block diagrams NI PCI 6110 3 1 NI PCI 6111 3 2 digital I O 3 8 timing signal routing device and RTSI clocks 3 10 overview 3 8 programm...

Страница 113: ...cabling 1 4 optional equipment 1 4 overview 1 1 questions about analog input and output C 3 general information C 1 installing and configuring C 2 timing and digital I O C 4 requirements for getting...

Страница 114: ...ble 4 7 PFIs programmable function inputs connecting to external signal source caution C 6 overview 4 16 questions about C 5 signal routing 3 10 timing input connections 4 17 PGIA analog input connect...

Страница 115: ...round referenced signal sources 4 11 overview 4 10 recommended configuration table 4 10 digital I O 4 15 field wiring considerations 4 37 I O connector connector details table 4 1 exceeding maximum ra...

Страница 116: ...dynamic characteristics A 6 output characteristics A 5 stability A 6 transfer characteristics A 5 voltage output A 5 bus interface A 10 CE compliance A 12 digital I O A 6 electromagnetic compatibilit...

Страница 117: ...7 timing signal routing 3 8 device and RTSI clocks 3 10 programmable function inputs 3 10 RTSI triggers 3 11 STARTSCAN signal routing figure 3 9 training customer D 1 transfer characteristics specifi...

Страница 118: ...ew 4 27 questions about C 3 UISOURCE signal 4 30 UPDATE signal 4 29 WFTRIG signal 4 28 Web professional services D 1 technical support D 1 WFTRIG signal See also PFI6 WFTRIG signal timing connections...

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