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Chapter 4
Connecting Signals
©
National Instruments Corporation
4-23
Figures 4-13 and 4-14 show the input and output timing requirements
for TRIG1.
Figure 4-13.
TRIG1 Input Signal Timing
Figure 4-14.
TRIG1 Output Signal Timing
The device also uses TRIG1 to initiate pretriggered DAQ operations.
In most pretriggered applications, TRIG1 is generated by a software
trigger. Refer to the TRIG2 signal description for a complete description
of the use of TRIG1 and TRIG2 in a pretriggered DAQ operation.
TRIG2 Signal
Any PFI pin can externally input the TRIG2 signal, which is available as
an output on the PFI1/TRIG2 pin. Refer to Figure 4-12 for the relationship
of TRIG2 to the DAQ sequence.
As an input, TRIG2 is configured in the edge-detection mode. You can
select any PFI pin as the source for TRIG2 and configure the polarity
selection for either rising or falling edge. The selected edge of TRIG2
initiates the posttriggered phase of a pretriggered DAQ sequence. In
pretriggered mode, the TRIG1 signal initiates the data acquisition. The scan
counter (SC) indicates the minimum number of scans before TRIG2 can be
recognized. After the SC decrements to zero, it is loaded with the number
of posttrigger scans to acquire while the acquisition continues. The device
Rising-Edge
Polarity
Falling-Edge
Polarity
t
w
= 10 ns minimum
t
w
t
w
= 50 to 100 ns
t
w