Table of Contents
©
National Instruments Corporation
vii
DAQArb 5411 User Manual
Appendix B
Waveform Sampling and Interpolation
Appendix C
Customer Communication
Figures
DAQArb 5411 I/O Connector................................................................ 3-1
Output Levels and Load Termination
Using a 50
Output Impedance ........................................................... 3-2
SYNC Output and Duty Cycle............................................................... 3-3
SHC50-68 68-Pin Connector Pin Assignments ..................................... 3-7
DAQArb 5411 Block Diagram .............................................................. 4-1
Waveform Data Path Block Diagram .................................................... 4-3
Waveform Memory Architecture........................................................... 4-4
Waveform Linking and Looping ........................................................... 4-6
Waveform Staging Block Diagram........................................................ 4-7
Waveform Generation Process .............................................................. 4-8
DDS Building Blocks ............................................................................ 4-9
Waveform Generation Trigger Sources ................................................. 4-12
Single Trigger Mode for Arb Mode....................................................... 4-13
Figure 4-10. Single Trigger Mode for DDS Mode ..................................................... 4-13
Figure 4-11. Continuous Trigger Mode for Arb Mode .............................................. 4-14
Figure 4-12. Continuous Trigger Mode for DDS Mode............................................. 4-14
Figure 4-13. Stepped Trigger Mode for Arb Mode .................................................... 4-15
Figure 4-14. Burst Trigger Mode for Arb Mode ........................................................ 4-16