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Appendix A

Specifications

A-6

National Instruments Corporation

gain amplifier. After the input multiplexers are switched, the amplifier must
be allowed to settle to the new input signal value to within 12-bit accuracy.
The settling time is a function of the gain selected.

Analog Output

Output Characteristics

Number of channels................................Two voltage

Resolution ...............................................12 bits, 1 in 4,096

Typical update rate .................................20 S/s–1 kS/s, system dependent

Type of DAC ..........................................Double buffered

Data transfers ..........................................Interrupts, programmed I/O

Transfer Characteristics

Relative accuracy (INL) .........................±0.25 LSB typ, ±0.50 LSB max

DNL ........................................................±0.25 LSB typ, ±0.75 LSB max

Monotonicity ..........................................12 bits, guaranteed

Offset error

After calibration...............................±0.2 mV max

Before calibration ............................±50 mV max

Gain error (relative to internal reference)

After calibration...............................±0.01% of reading max

Before calibration ............................±1% of reading max

Voltage Output

Ranges ....................................................0 to 10 V, ±5 V,

software selectable

Output coupling ......................................DC

Output impedance...................................0.2

Ω

typ

Current drive ..........................................±2 mA

Protection................................................Short circuit to ground

Содержание DAQ PCI-1200

Страница 1: ...DAQ PCI 1200 User Manual Multifunctional I O Board for PCI Bus Computers PCI 1200 User Manual July 1998 Edition Part Number 320942C 01 ...

Страница 2: ...336 Canada Ontario 905 785 0085 Canada Québec 514 694 8521 Denmark 45 76 26 00 Finland 09 725 725 11 France 01 48 14 24 24 Germany 089 741 31 30 Hong Kong 2645 3186 Israel 03 6120092 Italy 02 413091 Japan 03 5472 2970 Korea 02 596 7456 Mexico 5 520 2635 Netherlands 0348 433466 Norway 32 84 84 00 Singapore 2265886 Spain 91 640 0085 Sweden 08 730 49 70 Switzerland 056 200 51 51 Taiwan 02 377 1200 Un...

Страница 3: ...NTAL OR CONSEQUENTIAL DAMAGES EVEN IF ADVISED OF THE POSSIBILITY THEREOF This limitation of the liability of National Instruments will apply regardless of the form of action whether in contract or tort including negligence Any action against National Instruments must be brought within one year after the cause of action accrues National Instruments shall not be liable for any delay in performance d...

Страница 4: ...nstruments Application Software 1 2 NI DAQ Driver Software 1 3 Register Level Programming 1 4 Optional Equipment 1 5 Custom Cabling 1 5 Chapter 2 Installation and Configuration Software Installation 2 1 Hardware Installation 2 1 Board Configuration 2 2 Analog I O Configuration 2 2 Analog Output Polarity 2 3 Analog Input Polarity 2 3 Analog Input Mode 2 3 RSE Input Eight Channels Reset Condition 2 ...

Страница 5: ...n Considerations 3 14 Analog Output Signal Connections 3 15 Digital I O Signal Connections 3 16 Logical Inputs and Outputs 3 17 Port C Pin Connections 3 18 Power Connections 3 18 DAQ and General Purpose Timing Signal Connections 3 18 DAQ Timing Connections 3 19 General Purpose Timing Signal Connections 3 23 Timing Specifications 3 27 Mode 1 Input Timing 3 28 Mode 1 Output Timing 3 29 Mode 2 Bidire...

Страница 6: ...6 Figure 3 3 Differential Input Connections for Grounded Signal Sources 3 10 Figure 3 4 Differential Input Connections for Floating Sources 3 11 Figure 3 5 Single Ended Input Connections for Floating Signal Sources 3 13 Figure 3 6 Single Ended Input Connections for Grounded Signal Sources 3 14 Figure 3 7 Analog Output Signal Connections 3 16 Figure 3 8 Digital I O Connections 3 17 Figure 3 9 EXTCO...

Страница 7: ...e 4 4 Analog Input Circuitry 4 5 Figure 4 5 Analog Output Circuitry 4 11 Figure 4 6 Digital I O Circuitry 4 12 Tables Table 2 1 Analog I O Settings 2 2 Table 2 2 Analog Input Modes for the PCI 1200 2 4 Table 3 1 Signal Descriptions for PCI 1200 I O Connector Pins 3 3 Table 3 2 Bipolar Analog Input Signal Range Versus Gain 3 5 Table 3 3 Unipolar Analog Input Signal Range Versus Gain 3 5 Table 3 4 S...

Страница 8: ... how to build custom cables and unpack the PCI 1200 Chapter 2 Installation and Configuration describes how to install and configure your PCI 1200 Chapter 3 Signal Connections describes how to make input and output signal connections to the PCI 1200 board via the board I O connector and details the I O timing specifications Chapter 4 Theory of Operation explains the operation of each functional uni...

Страница 9: ...ic Bold italic text denotes a note caution or warning italic Italic text denotes variables emphasis a cross reference or an introduction to a key concept Macintosh Macintosh refers to all Macintosh computers with PCI bus unless otherwise noted monospace Text in this font denotes text or characters that you should literally enter from the keyboard sections of code programming examples and syntax ex...

Страница 10: ...at plugs into or is connected to your computer Use these manuals for hardware installation and configuration instructions specification information about your DAQ hardware and application hints Software documentation Examples of software documentation you may have are the LabVIEW or LabWindows CVI documentation sets and the NI DAQ documentation After you set up your hardware system use either the ...

Страница 11: ...l Programmer Manual This manual is available from National Instruments by request If you are using NI DAQ LabVIEW LabWindows CVI or other application software you should not need the register level programmer manual Using NI DAQ LabVIEW LabWindows CVI or other application software is easier than and as flexible as using the low level programming described in the register level programmer manual Re...

Страница 12: ...imation ADC two 12 bit DACs with voltage outputs 24 lines of TTL compatible digital I O and three 16 bit counter timers for timing I O The PCI 1200 is a member of the National Instruments PCI Series of expansion boards for PCI bus computers These boards are designed for high performance data acquisition and control for applications in laboratory testing production testing and industrial process mo...

Страница 13: ...nto your computer Never touch the exposed pins of connectors Software Programming Choices There are several options to choose from when programming your National Instruments DAQ or SCXI hardware You can use LabVIEW LabWindows CVI ComponentWorks VirtualBench NI DAQ or register level programming National Instruments Application Software ComponentWorks contains tools for data acquisition and instrume...

Страница 14: ...NI DAQ driver software is included at no charge with all National Instruments DAQ hardware NI DAQ is not packaged with SCXI or accessory products except for the SCXI 1200 NI DAQ has an extensive library of functions that you can call from your application programming environment These functions include routines for analog input A D conversion buffered data acquisition high speed A D conversion ana...

Страница 15: ...ware is to write register level software Writing register level programming software can be very time consuming and inefficient and is not recommended for most users Even if you are an experienced register level programmer consider using NI DAQ LabVIEW LabWindows CVI or other National Instruments application software to program your National Instruments DAQ hardware Using the National Instruments ...

Страница 16: ...old and relays For more information about optional equipment available from National Instruments refer to your National Instruments catalogue or call the office nearest you Custom Cabling National Instruments offers cables and accessories for you to prototype your application or to use if you frequently change board interconnections If you want to develop your own cable however the following guide...

Страница 17: ...ized ribbon socket connector with strain relief National Instruments uses a polarized keyed connector to prevent inadvertent upside down connection to the PCI 1200 Recommended manufacturer part numbers for this mating connector are as follows Electronic Products Division 3M part number 3425 7650 T B Ansley Corporation part number 609 5041CE ...

Страница 18: ...stalled in any unused PCI expansion slot in your computer The following are general installation instructions Consult the user manual or technical reference manual for your computer for specific instructions and warnings 1 Turn off your computer 2 Remove the top cover or access port to the I O channel 3 Remove the expansion slot cover on the back panel of the computer 4 Insert the PCI 1200 in an u...

Страница 19: ...ing configuration Referenced single ended input mode 5 V analog input range bipolar 5 V analog output range bipolar Table 2 1 lists all the available analog I O configurations for the PCI 1200 and shows the configuration in reset condition Both the analog input and analog output circuitries are software configurable Refer to your software documentation for more information on changing these settin...

Страница 20: ... a DAC the straight binary coding is recommended In this mode data values written to the analog output channel range from 0 to FFF hex 4 095 decimal Analog Input Polarity You can select the analog input on the PCI 1200 for either a unipolar range 0 to 10 V or a bipolar range 5 to 5 V In addition you can select the coding scheme for analog input as either two s complement or straight binary If you ...

Страница 21: ...he signal return path is analog ground at the connector through the AISENSE AIGND pin NRSE Input Eight Channels NRSE input means that all input signals are referenced to the same common mode voltage which floats with respect to the PCI 1200 analog ground This common mode voltage is subsequently subtracted by the input instrumentation amplifier The NRSE configuration is useful for measuring ground ...

Страница 22: ...Four Channels DIFF input means that each input signal has its own reference and the difference between each signal and its reference is measured The signal and its reference are each assigned an input channel With this input configuration the PCI 1200 can monitor four differential analog input signals Considerations for using the DIFF configuration are discussed in Chapter 3 Signal Connections Not...

Страница 23: ...es I O Connector Figure 3 1 shows the pin assignments for the PCI 1200 I O connector Caution Connections that exceed any of the maximum ratings of input or output signals on the PCI 1200 may damage the PCI 1200 and the computer This includes connecting any power signals to ground and vice versa You should not externally drive digital I O lines while the computer is powered off doing so can damage ...

Страница 24: ...gives the signal name and description of each signal connector pin 5 V GATB2 CLKB1 OUTB1 OUTB0 EXTUPDATE PC7 PC5 PC3 PC1 PB7 PB5 PB3 PB1 PA7 PA5 PA3 PA1 DGND AGND AISENSE AIGND ACH6 ACH4 ACH2 ACH0 DGND OUTB2 GATB1 EXTCONV EXTTRIG PC6 PC4 CLKB2 GATB0 PC2 PC0 PB6 PB4 PB2 PB0 PA6 PA4 PA2 PA0 DAC1OUT DAC0OUT ACH7 ACH5 ACH3 ACH1 49 50 47 48 45 46 43 44 41 42 39 40 37 38 35 36 33 34 31 32 29 30 27 28 25...

Страница 25: ... output voltages Bias current return point for differential measurements 12 DAC1OUT AO AGND Digital to Analog Converter 1 Output Voltage output signal for analog output channel 1 13 50 DGND N A N A Digital Ground Voltage ground reference for the digital signals and the 5 V supply 14 21 PA 7 0 DIO DGND Port A 7 through 0 Bidirectional data lines for port A PA7 is the MSB and PA0 is the LSB 22 29 PB...

Страница 26: ...DIO DGND Output B1 Digital output signal of counter B1 DO External control signal for timing a scan interval DI 44 GATB1 DI DGND Gate B1 External control signal for gating counter B1 45 CLKB1 DI DGND Clock B1 External control clock signal for counter B1 46 OUTB2 DO DGND Counter B2 Digital output signal of counter B2 47 GATB2 DI DGND Gate B2 External control signal for gating counter B2 48 CLKB2 DI...

Страница 27: ...hown in Tables 3 2 and 3 3 Exceeding the input signal range will not damage the input circuitry as long as the maximum powered on input voltage rating of 35 V or powered off voltage rating of 25 V is not exceeded The PCI 1200 is guaranteed to withstand inputs up to the maximum input voltage rating Caution Exceeding the input signal range distorts input signals Exceeding the maximum input voltage r...

Страница 28: ...ted to the positive and negative inputs of the instrumentation amplifier through input multiplexers on the PCI 1200 The instrumentation amplifier converts two input signals to a signal that is the difference between the two input signals multiplied by the gain setting of the amplifier The amplifier output voltage is referenced to the PCI 1200 ground The PCI 1200 ADC measures this output voltage wh...

Страница 29: ...tegory Ground Referenced Signal Sources A ground referenced signal source is connected in some way to the building system ground and is therefore already connected to a common ground point with respect to the PCI 1200 assuming that the computer is plugged into the same power system Nonisolated outputs of instruments and devices that plug into the building power system fall into this category The d...

Страница 30: ...e Ended Nonreferenced NRSE Floating Signal Source Not Connected to Building Ground Grounded Signal Source Examples Ungrounded Thermocouples Signal conditioning with isolated outputs Battery devices Examples Plug in instruments with nonisolated outputs V1 ACH V1 ACH ACH See text for information on bias resistors See text for information on bias resistors R Signal Source Type ACH AIGND V1 ACH AIGND ...

Страница 31: ...I 1200 for DIFF input each signal uses two of the multiplexer inputs one for the signal and one for its reference signal Therefore only four analog input channels are available when using the DIFF configuration Use the DIFF input configuration when any of the following conditions is present Input signals are low level less than 1 V Leads connecting the signals to the PCI 1200 are greater than 10 f...

Страница 32: ...Chapter 2 Installation and Configuration Figure 3 3 Differential Input Connections for Grounded Signal Sources With this type of connection the instrumentation amplifier rejects both the common mode noise in the signal and the ground potential difference between the signal source and the PCI 1200 ground shown as Vcm in Figure 3 3 Grounded Signal Source Vm Measured Voltage Vs I O Connector PCI 1200...

Страница 33: ...hapter 2 Installation and Configuration Figure 3 4 Differential Input Connections for Floating Sources The 100 kΩ resistors shown in Figure 3 4 create a return path to ground for the bias currents of the instrumentation amplifier If there is no return path the instrumentation amplifier bias currents charge stray capacitances Floating Signal Source Vm Measured Voltage Vs I O Connector PCI 1200 in D...

Страница 34: ...ground point is tied to the negative input of the instrumentation amplifier When the PCI 1200 is configured for single ended input NRSE or RSE eight analog input channels are available Use single ended input connections when the following conditions are met by all input signals Input signals are high level greater than 1 V Leads connecting the signals to the PCI 1200 are less than 10 ft All input ...

Страница 35: ...d signal source with a single ended configuration configure the PCI 1200 in the NRSE input configuration The signal is connected to the positive input of the PCI 1200 instrumentation amplifier and the signal local ground reference is connected to the negative input of the PCI 1200 instrumentation amplifier Therefore connect the ground point of the signal to the AISENSE pin Any potential difference...

Страница 36: ... connections for signal sources that are already referenced to some ground point with respect to the PCI 1200 In these cases the instrumentation amplifier can reject any voltage caused by ground potential differences between the signal source and the PCI 1200 In addition with differential input connections the instrumentation amplifier can reject common mode noise pickup in the leads connecting th...

Страница 37: ...emain within a range of 5 to 10 V in both bipolar and unipolar modes Analog Output Signal Connections Pins 10 through 12 on the I O connector are analog output signal pins Pins 10 and 12 are the DAC0OUT and DAC1OUT signal pins DAC0OUT is the voltage output signal for analog output channel 0 DAC1OUT is the voltage output signal for analog output channel 1 Pin 11 AGND is the ground reference point f...

Страница 38: ...ee 8 bit ports PA PB and PC of the 82C55A Pins 14 through 21 are connected to the digital lines PA 7 0 for digital I O port A Pins 22 through 29 are connected to the digital lines PB 7 0 for digital I O port B Pins 30 through 37 are connected to the digital lines PC 7 0 for digital I O port C Pin 13 DGND is the digital ground pin for all three digital I O ports Refer to Appendix A Specifications f...

Страница 39: ...ic high voltage 3 7 V min at output current 2 5 mA Input leakage current 1 µA min 1 µA max 0 Vin 5 V Figure 3 8 illustrates signal connections for three typical digital I O applications Figure 3 8 Digital I O Connections In Figure 3 8 port A is configured for digital output and ports B and C are configured for digital input Digital input applications include receiving TTL signals and sensing exter...

Страница 40: ...fter the overcurrent condition is removed Pin 49 is referenced to DGND and you can use the 5 V to power external digital circuitry Power rating 1 A at 4 65 to 5 25 V Warning Do not directly connect this 5 V power pin to analog or digital ground or to any other voltage source on the PCI 1200 or any other device Doing so can damage the PCI 1200 or your computer National Instruments is NOT liable for...

Страница 41: ... after a predefined number of samples These counters are not available for general use Instead of counter A0 you can use EXTCONV to externally time conversions Figure 3 9 shows the timing requirements for the EXTCONV input An A D conversion is initiated by a falling edge on the EXTCONV Figure 3 9 EXTCONV Signal Timing The external control signal EXTTRIG can either start a DAQ sequence or terminate...

Страница 42: ...software enabled which initiates the DAQ operation However the sample counter is not started until the EXTTRIG input senses a rising edge Conversions remain enabled until the sample counter counts to zero The maximum number of samples acquired after the stop trigger is limited to 65 535 The number of samples acquired before the trigger is limited only by the size of the memory buffer available for...

Страница 43: ...ernally through OUTB1 and EXTCONV Channels 1 and 0 of the input multiplexers are scanned once during each scan interval The first rising edge of EXTCONV must occur a minimum of 50 ns after the rising edge on OUTB1 The first rising edge of EXTCONV after the rising edge of OUTB1 enables an internal GATE signal that allows conversions to occur The first conversion then occurs on the following falling...

Страница 44: ...ation an interrupt is generated whenever a rising edge is detected on the EXTUPDATE bit Therefore you can perform externally timed interrupt driven waveform generation on the PCI 1200 The EXTUPDATE line is susceptible to noise caused by switching lines and could generate false interrupts We recommend that the width of the EXTUPDATE pulse be as short as possible but greater than 50 ns Figure 3 13 i...

Страница 45: ...pplications such as pulse and square wave generation event counting and pulse width time lapse and frequency measurement For these applications the CLK and GATE signals at the I O connector control the counters The single exception is counter B0 which has an internal 2 MHz clock To perform pulse and square wave generation program a counter to generate a timing signal at its OUT output pin To perfo...

Страница 46: ...he counter Program the counter to start counting after receiving a low to high edge The time lapse since receiving the edge equals the counter value difference loaded value minus read value multiplied by the CLK period To perform frequency measurement program a counter to be level gated and count the number of falling edges in a signal applied to a CLK input The gate signal applied to the counter ...

Страница 47: ...ns are internally pulled up to 5 V through a 100 kΩ resistor Refer to Appendix A Specifications for signal voltage and current specifications The following specifications and ratings apply to the 82C53 I O signals Absolute max 0 5 to 5 5 V voltage input rating with respect to DGND 82C53 digital input specifications referenced to DGND Vih input logic high voltage 2 2 V min 5 3 V max Vil input logic...

Страница 48: ...ng specifications for the 82C53 OUT output signals Figure 3 16 General Purpose Timing Signals The GATE and OUT signals in Figure 3 16 are referenced to the rising edge of the CLK signal tsc tpwh tpwl tgsu tgh tgwh tgwl toutc toutg CLK GATE OUT VOH VIH VIL VIH VOL VIL tsc tpwh tpwl tgsu tgh tgwh tgwl toutc toutg clock period clock high level clock low level gate setup time gate hold time gate high ...

Страница 49: ...ignal on this handshaking line indicates that the data written from the specified port has been accepted This signal is primarily a response from the external device that it has received the data from the PCI 1200 OBF Output Output Buffer Full A low signal on this handshaking line indicates that data has been written from the specified port INTR Output Interrupt Request This signal becomes high wh...

Страница 50: ... in mode 1 are as follows Figure 3 17 Mode 1 Timing Specifications for Input Transfers Name Description Minimum Maximum T1 STB pulse width 500 T2 STB 0 to IBF 1 300 T3 Data before STB 1 0 T4 STB 1 to INTR 1 300 T5 Data after STB 1 180 T6 RD 0 to INTR 0 400 T7 RD 1 to IBF 0 300 All timing values are in nanoseconds DATA RD INTR IBF STB T1 T2 T4 T7 T6 T3 T5 ...

Страница 51: ...tput transfer in mode 1 are as follows Figure 3 18 Mode 1 Timing Specifications for Output Transfers Name Description Minimum Maximum T1 WRT 0 to INTR 0 450 T2 WRT 1 to output 350 T3 WRT 1 to OBF 0 650 T4 ACK 0 to OBF 1 350 T5 ACK pulse width 300 T6 ACK 1 to INTR 1 350 All timing values are in nanoseconds WRT OBF INTR ACK DATA T1 T2 T3 T4 T5 T6 ...

Страница 52: ...ming Specifications for Bidirectional Transfers Name Description Minimum Maximum T1 WRT 1 to OBF 0 650 T2 Data before STB 1 0 T3 STB pulse width 500 T4 STB 0 to IBF 1 300 T5 Data after STB 1 180 T6 ACK 0 to OBF 1 350 T7 ACK pulse width 300 T8 ACK 0 to output 300 T9 ACK 1 to output float 20 250 T10 RD 1 to IBF 0 300 All timing values are in nanoseconds T1 T6 T7 T3 T4 T10 T2 T5 T8 T9 WRT OBF INTR AC...

Страница 53: ...llows MITE PCI interface circuitry Timing circuitry Analog input circuitry Analog output circuitry 12 3 12 8 16 8 8 12 1 24 I O Connector PCI Bus Dither Calibration 4 4 1 MHz Timebase 10 MHz Oscillator Time Divider 2 MHz Timebase Digital Control Logic MITE PCI Interface Chip 82C53 Ctr Timer Group A 82C55A Digital Interface 82C53 Ctr Timer Group B 12 Bit D A 12 Bit D A Pgm Gain 12 Bit A D FIFO Inpu...

Страница 54: ...ication Specific Integrated Circuit ASIC designed by National Instruments specifically for data acquisition The digital control logic chip connects the MITE PCI interface chip with the rest of the board The PCI 1200 is fully compliant with PCI Local Bus Specification Revision 2 0 Therefore the base memory address and interrupt level for the board are stored inside the MITE PCI interface chip at po...

Страница 55: ...y When the A D FIFO is half full When a DAQ operation completes including when either an OVERFLOW or an OVERRUN error occurs When the digital I O circuitry generates an interrupt When a rising edge signal is detected on the DAC update signal Timing The PCI 1200 uses two 82C53 counter timer integrated circuits for internal DAQ and DAC timing and for general purpose I O timing functions Figure 4 3 s...

Страница 56: ... D Conversion Logic 1 MHz Source OUTB0 CLKA0 GATEB0 OUTB0 CLKB1 GATEB1 OUTB2 GATEB2 CLKB2 D A Conversion Logic 82C53 Counter Timer Group A CTR RD CTR WRT Data 8 82C53 Counter Timer Group B OUTB0 OUTB2 GATEB2 CLKB2 GATEB1 Scan Interval General Purpose Counter CLKB1 OUTB1 GATEB0 Timebase Extension General Purpose Counter CLKB0 5 V MUX MUX EXTUPDATE EXTTRIG EXTCONV I O Connector CLKA2 OUTA0 Sample In...

Страница 57: ...0 has eight channels of analog input with software programmable gain and 12 bit A D conversion The PCI 1200 also contains DAQ timing circuitry for automatic timing of multiple A D conversions and includes advanced options such as external triggering gating and clocking Figure 4 4 shows a block diagram of the analog input circuitry Figure 4 4 Analog Input Circuitry Sample and Hold Amp DAQ Timing Ga...

Страница 58: ...tice that you use the same gain setting for all channels in the scan sequence The programmable gain amplifier applies gain to the input signal allowing an input analog signal to be amplified before being sampled and converted thus increasing measurement resolution and accuracy The instrumentation amplifier gain is software selectable The PCI 1200 board provides gains of 1 2 5 10 20 50 and 100 The ...

Страница 59: ...4 095 Two s complement is the recommended coding scheme for bipolar input mode With this scheme the ADC data is interpreted as a 12 bit two s complement number with a range of 2 048 to 2 047 The ADC output is then sign extended to 16 bits causing either a leading 0 or a leading F hex to be added depending on the coding and the sign Thus data values read from the FIFO are 16 bits wide DAQ Operation...

Страница 60: ...ed and turns off counter A0 either after the required number of conversions has been obtained or after some other user defined criteria have been met The number of conversions in a single freerun acquisition mode DAQ operation is unlimited Interval Scanning Acquisition Mode The PCI 1200 uses two counters for interval scanning data acquisition Counter B1 is used to time the scan interval Counter A0...

Страница 61: ... counter A0 of the timing circuitry To specify a single channel analog input operation select an analog input channel and a gain setting for that channel Multichannel Scanned Data Acquisition The PCI 1200 executes a multichannel DAQ operation by repeatedly scanning a sequence of analog input channels the same gain is applied to each channel in the sequence The channels are scanned in decreasing co...

Страница 62: ...ing during multichannel scanning Table 4 2 shows the maximum recommended DAQ rates for both single channel and multichannel data acquisition For single channel scanning this rate is limited only by the ADC conversion period plus the sample and hold acquisition time specified at 10 µs For multichannel data acquisition observing the DAQ rates in Table 4 2 ensures 12 bit resolution The hardware is ca...

Страница 63: ...portional to the 10 V internal reference multiplied by the 12 bit digital code loaded into the DAC The voltage output from the two DACs is available at the DAC0OUT and DAC1OUT pins You can program each DAC channel for a unipolar voltage output or a bipolar voltage output range A unipolar output gives an output voltage range of 0 0000 to 9 9976 V A bipolar output gives an output voltage range of 5 ...

Страница 64: ...eneration These two modes are software selectable Digital I O The digital I O circuitry has an 82C55A integrated circuit The 82C55A is a general purpose programmable peripheral interface containing 24 programmable I O pins These pins represent the three 8 bit I O ports A B and C of the 82C55A as well as PA 0 7 PB 0 7 and PC 0 7 on the PCI 1200 I O connector Figure 4 6 shows the digital I O circuit...

Страница 65: ... User Manual All three ports on the 82C55A are TTL compatible When enabled the digital output ports are capable of sinking 2 5 mA of current and sourcing 2 5 mA of current on each digital I O line When the ports are not enabled the digital I O lines act as high impedance inputs ...

Страница 66: ...using register level writes you need to use the PCI 1200 Register Level Programmer Manual The PCI 1200 is software calibrated The calibration process involves reading offset and gain errors from the analog input and analog output data areas and writing values to the appropriate calibration DACs to null the errors There are four calibration DACs associated with the analog input circuitry and four c...

Страница 67: ...he reading Therefore when you are recalibrating the PCI 1200 you should perform gain calibration at all other gains 2 5 10 20 50 and 100 and store the corresponding values in the user gain calibration data area of the EEPROM thus ensuring a maximum error of 0 02 at all gains The PCI 1200 is factory calibrated at all gains and NI DAQ automatically loads the correct values into the calibration DACs ...

Страница 68: ...offset calibration and apply an accurate voltage reference to another input channel for gain calibration You should first configure the ADC for RSE mode then for the correct polarity at which you want to perform data acquisition To use the Calibrate_1200 function or the 1200 Calibrate VI for analog output calibration the DAC0 and DAC1 outputs must be wrapped back and applied to two other analog in...

Страница 69: ...channels Eight single ended eight pseudodifferential or four differential software selectable Type of ADC Successive approximation Resolution 12 bits 1 in 4 096 Max sampling rate 100 kS s Input signal ranges Input coupling DC Board Gain Software Selectable Board Ranges Software Selectable 5 V 0 to 10 V 1 5 V 0 to 10 V 2 2 5 V 0 to 5 V 5 1 V 0 to 2 V 10 500 mV 0 to 1 V 20 250 mV 0 to 500 mV 50 100 ...

Страница 70: ...transfers DMA interrupts programmed I O DMA mode Scatter gather Dither Available Transfer Characteristics Relative accuracy 0 5 LSB typ dithered 1 5 LSB max undithered DNL 1 LSB max No missing codes 12 bits guaranteed Offset error Pregain error after calibration 10 µV max Pregain error before calibration 20 mV max Postgain error after calibration 1 mV max Postgain error before calibration 200 mV m...

Страница 71: ...h Small signal 3 dB Settling time for full scale step System noise including quantization error Stability Recommended warm up time 15 min Gain Bandwidth 1 10 250 kHz 20 150 kHz 50 60 kHz 100 30 kHz Gain Settling Time Accuracy 0 024 1 LSB 1 10 µs typ 14 µs max 2 10 13 µs typ 16 µs max 20 15 µs typ 19 µs max 50 27 µs typ 34 µs max 100 60 µs typ 80 µs max Gain Dither off Dither on 1 50 0 3 LSB rms 0 ...

Страница 72: ...it is more specific to use relative accuracy as a measure of linearity than it is to use what is normally called nonlinearity because relative accuracy ensures that the sum of quantization uncertainty and A D conversion error does not exceed a given amount Integral nonlinearity INL in an ADC is an often ill defined specification that is supposed to indicate a converter s overall A D transfer linea...

Страница 73: ...ther The dither circuitry when enabled adds approximately 0 5 LSB rms of white Gaussian noise to the signal to be converted to the ADC This addition is useful for applications involving averaging to increase the resolution of the PCI 1200 to more than 12 bits as in calibration In such applications which are often lower frequency in nature noise modulation is decreased and differential linearity is...

Страница 74: ...cal update rate 20 S s 1 kS s system dependent Type of DAC Double buffered Data transfers Interrupts programmed I O Transfer Characteristics Relative accuracy INL 0 25 LSB typ 0 50 LSB max DNL 0 25 LSB typ 0 75 LSB max Monotonicity 12 bits guaranteed Offset error After calibration 0 2 mV max Before calibration 50 mV max Gain error relative to internal reference After calibration 0 01 of reading ma...

Страница 75: ...tem is therefore limited to the worst case deviation from the ideal correspondence a straight line except noise If a D A system has been calibrated perfectly the relative accuracy specification reflects its worst case absolute error DNL in a D A system is a measure of deviation of code width from 1 LSB In this case code width is the difference between the analog values produced by consecutive digi...

Страница 76: ...nter timers Protection 0 5 to 5 5 V powered on 0 5 V powered off Resolution Counter timers 16 bits Compatibility TTL Base clock available 2 MHz Base clock accuracy 50 ppm max Max source frequency 8 MHz Min source pulse duration 125 ns Min gate pulse duration 50 ns Digital logic levels Output low voltage IOUT 2 5 mA 0 4 V Output high voltage IOUT 40 µA IOUT 2 5 mA 4 2 V 3 7 V Level Min Max Input lo...

Страница 77: ...idth 50 ns min Bus Interface Type Slave Power Requirement Power consumption 425 mA at 5 VDC 5 Power available at I O connector 4 65 to 5 25 V fused at 1 A Physical Dimensions 17 45 by 10 56 cm 6 87 by 4 16 in I O connector 50 pin male Environment Operating temperature 0 to 50 C Storage temperature 55 to 150 C Relative humidity 5 to 90 noncondensing Output low voltage IOUT 2 1 mA 0 45 V Output high...

Страница 78: ...oes not answer your questions we offer fax and telephone support through our technical support centers which are staffed by applications engineers Electronic Services Bulletin Board Support National Instruments has BBS and FTP sites dedicated for 24 hour support with a collection of files and documents to answer most common customer questions From these sites you can also download the latest instr...

Страница 79: ... office in your country contact the source from which you purchased your software to obtain support Country Telephone Fax Australia 03 9879 5166 03 9879 6277 Austria 0662 45 79 90 0 0662 45 79 90 19 Belgium 02 757 00 20 02 757 03 11 Brazil 011 288 3336 011 288 8528 Canada Ontario 905 785 0085 905 785 0086 Canada Québec 514 694 8521 514 694 4399 Denmark 45 76 26 00 45 76 26 02 Finland 09 725 725 11...

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Страница 85: ...x Meanings Value p pico 10 12 n nano 10 9 µ micro 10 6 m milli 10 3 k kilo 103 M mega 106 G giga 109 Numbers Symbols degrees greater than greater than or equal to less than negative of or minus not equal to Ω ohms percent plus or minus positive of or plus 5 V 5 Volts signal ...

Страница 86: ... a digital number AGND analog ground signal AI analog input AISENSE AIGND analog input sense analog input ground signal ANSI American National Standards Institute AO analog output AWG American Wire Gauge C C Celsius CALDAC calibration digital to analog converter CH channel CLKB1 CLKB2 counter B1 B2 clock signals cm centimeters CMRR common mode rejection ratio a measure of an instrument s ability t...

Страница 87: ...DAQ data acquisition a system that uses the computer to collect receive and generate electrical signals DATA data lines at the specified port signal dB decibel the unit for expressing a logarithmic measure of the ratio of two signal levels dB 20log10 V1 V2 for signals in volts DC direct current DGND digital ground signal DI digital input DIFF differential DIO digital input output DMA direct memory...

Страница 88: ...irst in first out memory buffer FSR full scale range ft feet G GATB 0 2 counter B0 B1 B2 gate signals GATE gate signal H hex hexadecimal Hz hertz I IBF input buffer full signal in inches INL integral nonlinearity a measure in LSB of the worst case deviation from the ideal A D or D A transfer characteristic of the analog I O circuitry INTR interrupt request signal I O input output ...

Страница 89: ...it mux multiplexer a switching device with multiple inputs that connects one of its inputs to its output N NRSE nonreferenced single ended mode all measurements are made with respect to a common NRSE measurement system reference but the voltage at this reference can vary with respect to the measurement system ground O OBF output buffer full signal OUTB0 OUTB1 counter B0 B1 output signals OVERFLOW ...

Страница 90: ...t postriggering the technique used on a DAQ board to acquire a programmed number of samples after trigger conditions are met POSTTRIG posttrigger mode PPI programmable peripheral interface ppm parts per million PRETRIG pretrigger mode pretriggering the technique used on a DAQ board to keep a continuous buffer filled with data so that when the trigger conditions are met the sample includes the data...

Страница 91: ...tensions for Instrumentation the National Instruments product line for conditioning low level signals within an external chassis near sensors so only high level signals are sent to DAQ boards in the noisy PC environment signal conditioning the manipulation of signals to prepare them for digitizing STB strobe input signal T td minimum period tgh gate hold time tgsu gate setup time tgwh gate high le...

Страница 92: ...voltage VI virtual instrument 1 a combination of hardware and or software elements typically used with a PC that has the functionality of a classic stand alone instrument 2 a LabVIEW software module VI which consists of a front panel user interface and a block diagram program VIH volts input high VIL volts input low Vm measured voltage Vrms volts root mean square Vs signal source W W watts WRT wri...

Страница 93: ...signal connections See analog input signal connections specifications A 1 to A 6 theory of operation 4 5 to 4 11 analog input configuration 2 2 to 2 5 analog I O settings table 2 2 differential connections purpose and use 3 9 recommended input configurations table 3 8 floating signal sources differential connections 3 11 to 3 12 recommended input configurations table 3 8 ground referenced signal s...

Страница 94: ...A 4 to A 5 input characteristics A 1 to A 2 stability A 3 to A 4 transfer characteristics A 2 analog output circuitry 4 11 to 4 12 DAC timing 4 12 polarity configuration 2 3 settings table 2 2 signal connections 3 15 to 3 16 theory of operation 4 11 to 4 12 analog output specifications A 6 to A 7 dynamic characteristics A 7 explanation A 7 output characteristics A 6 stability A 7 transfer characte...

Страница 95: ...0 DAQ timing connections 3 19 to 3 23 See also general purpose timing signal connections EXTCONV signal 3 19 to 3 21 EXTCONV signal timing figure 3 19 EXTTRIG signal 3 19 to 3 20 EXTUPDATE signal 3 22 to 3 23 interval scanning 3 21 pins 3 18 to 3 19 posttrigger and pretrigger modes 3 19 to 3 20 posttrigger timing figure 3 20 pretrigger timing figure 3 21 data acquisition timing connections See DAQ...

Страница 96: ... 2 Fax on Demand support B 2 floating signal sources differential connections 3 11 to 3 12 purpose and use 3 7 recommended input configurations table 3 8 single ended connections RSE configuration 3 13 freerun acquisition mode 4 8 frequency measurement connections for measurement application figure 3 25 general purpose timing signal connections 3 24 to 3 25 FTP support B 1 G GATB0 signal table 3 4...

Страница 97: ...indows CVI application software 1 3 M manual See documentation mode 1 input timing 3 28 mode 1 output timing 3 29 mode 2 bidirectional timing 3 30 multiple channel scanned data acquisition 4 9 multiplexers analog input 4 6 mux counters 4 6 N NI DAQ driver software 1 3 to 1 4 noise system A 5 NRSE input configuration 2 4 to 2 5 definition table 2 4 recommended input configurations table 3 8 single ...

Страница 98: ...n amplifier 4 6 pulse generation 3 23 pulse width measurement 3 24 R RD signal table 3 27 referenced single ended mode See RSE input register level programming 1 4 relative accuracy analog input A 4 analog output A 7 RSE input configuration 2 4 definition table 2 4 recommended input configurations table 3 8 single ended connections for floating signal sources 3 13 S sample interval timing 3 21 sig...

Страница 99: ...o A 8 environment A 9 physical A 9 power requirements A 9 timing I O A 8 to A 9 square wave generation 3 23 STB signal table 3 27 system noise A 5 T technical support B 1 to B 2 theory of operation analog input 4 5 to 4 11 circuitry 4 6 to 4 7 illustration 4 5 DAQ rates 4 10 to 4 11 analog output 4 11 to 4 12 circuitry 4 11 to 4 12 illustration 4 11 DAC timing 4 12 block diagram of PCI 1200 4 1 di...

Страница 100: ...ulse width measurement 3 24 specifications and ratings 3 25 to 3 26 square wave generation 3 23 time lapse measurement 3 24 timing requirements for GATE CLK and OUT signals figure 3 26 timing specifications 3 27 to 3 30 mode 1 input timing 3 28 mode 1 output timing 3 29 mode 2 bidirectional timing 3 30 trigger digital A 9 U unipolar signal range vs gain table 3 5 to 3 6 unpacking the PCI 1200 1 2 ...

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