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National Instruments Corporation
27
NI 6583R User Guide and Specifications
Generation (Data, Clock, and PFI Channels)
Output impedance ..................................................100
Ω
differential, nominal
Output protection ...................................................Each channel can indefinitely sustain a short to any
voltage between
−
0.5 V and 4.0 V.
Note
Internal diode clamps may begin conducting outside the 0 V to 3.3 V range.
Acquisition (Data, STROBE, and PFI Channels)
Input impedance.....................................................100
Ω
differential, nominal
Input protection......................................................Each channel can indefinitely sustain a short to any
voltage between
−
0.5 V and 4.0 V.
Note
Internal diode clamps may begin conducting outside the 0 V to 3.3 V range.
MLVDS Channels (DDC B)
(Consistent with TI part number SN65MLVD207)
Number of programmable I/O voltage levels ........None
Power up state ........................................................Drivers disabled, 100
Ω
differential impedance
Fault protection ......................................................Type 2
Typical data rate .....................................................200 Mb/s
Generation (Data, Clock, and PFI Channels)
Output impedance ..................................................100
Ω
differential, nominal
Output protection ...................................................Each channel can indefinitely sustain a short to any
voltage between
−
1.4 V and 3.8 V.
Table 9.
Generation Voltage Levels (50
Ω
total load)
Offset Voltage
Differential Voltage
Minimum
Typical
Maximum
Minimum
Typical
Maximum
1.125 V
1.2 V
1.375 V
247 mV
340 mV
454 mV
Table 10.
Acquisition Voltage Levels
Voltage Threshold
Voltage Range
Maximum
Minimum
Maximum
±
50 mV
0 V
2.4 V
Table 11.
Generation Voltage Levels (50
Ω
total load)
Offset Voltage
Differential Voltage
Minimum
Maximum
Minimum
Maximum
0.8 V
1.2 V
480 mV
650 mV