Motorola PPC/CPCI-690, Справочное руководство

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Address Maps Maps and Registers
6 - 4 PPC/CPCI-690
Address Maps
The address map is determined by the system controller’s internal struc-
ture. Each address window must have an address space larger than
1 MByte.
Caution
Board malfunction
Accesses to the reserved address areas and overlapping of address win-
dows result in unpredictable board behavior.
Only access address areas not marked as reserved. Make sure that
address windows do not overlap.
Table 25: Processor Memory Address Map
Base Address End Address Size Device Bus Width
00000000
16
7FFFFFFF
16
2048 MBytes Main memory 64 bit
80000000
16
EF7FFFFF
16
1784 MBytes PCI memory
1)
1) Contains up to four PCI memory windows for each PCI bus segment
64 bit
EF800000
16
EFFFFFFF
16
8 MBytes PCI I/O space
2)
2) Contains one PCI I/O window for each PCI bus segment
64 bit
F0000000
16
F0000007
16
8 Bytes Board registers 8 bit
F0000008
16
F00FFFFF
16
- Reserved -
F0100000
16
F0107FFF
16
32 KBytes RTC/NVRAM 8 bit
F0108000
16
F01FFFFF
16
- Reserved -
F0200000
16
F020000F
16
16 Bytes IPMI controller 8 bit
F0200000
16
F0200001
16
2 Bytes KCS0
3)
3) Interface of IPMI controller
8 bit
F0200008
16
F0200009
16
2 Bytes KCS1
3)
8 bit
F0200010
16
F0FFFFFF
16
- Reserved -
F1000000
16
F100FFFF
16
64 KBytes Discovery registers 64 bit
F1010000
16
F3FFFFFF
16
- Reserved -
F4000000
16
F7FFFFFF
16
64 MBytes User flash 8 bit
F8000000
16
FFEFFFFF
16
- Reserved -
FFF00000
16
FFFFFFFF
16
1 MBytes Boot flash
4)
4) Access to boot flash 1 and 2 is decoded by external logic
8 bit