MOTOROLA
Chapter 38. IEEE 1149.1 Test Access Port
38-5
Part VI. Debug and Test
Figure 38-5 shows the logic conÞguration for an output control boundary scan cell.
Figure 38-5. Input/Output Control Boundary Scan Cell (I/O Control Cell)
Figure 38-6 shows the logic conÞguration of bidirectional signal boundary scan cells.
Figure 38-6. Bidirectional (I/O) Signal Boundary Scan Cell
The value of the control bit controls the output function of the bidirectional signal. One or
more bidirectional data cells can be serially connected to a control cell. Bidirectional
signals include two scan cells for data (input and output buffers) and an I/O control block.
It is important to know the boundary scan bit order and the signals that are associated with
them. The bit order of the boundary scan chain (described in the MPC860 BSDL Þle) starts
with the TDO output and ends with the TDI input. The shift register cell nearest TDO (Þrst
to be shifted in) is deÞned as bit 1 and the last bit to be shifted in is bit 475.
MUX
G1
1
1
To Next Cell
G1
1
1
D
C
D
C
From Last Cell
Clock DR
Update DR
Shift DR
Output Control
from System
1 Ð Extest | Clamp
0 Ð Otherwise
MUX
To Output
Buffer
Logic
To Next Cell
O.PIN
Output Enable
from System
From Last Cell
I/O
Pin
I.OBS
I/O Control
To Next Pin Pair
EN
Output Data
Input Data
Logic
Содержание MPC860 PowerQUICC
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