MPC564EVB User’s Manual
1-3
Processor
Figure 1-1. MPC564EVB top view
1.1 Processor
The microprocessor used on the MPC564EVB is the highly integrated Motorola PowerPC
MPC564 32-bit microcontroller. The MPC564 implements a PPC ISA core with 512KByte UC3F
flash, two UART channels, two Timing Processor Units (TPUs)
1
, 32 KBytes of SRAM, a QSPI
(Queued Serial Peripheral Interface) module, three TouCAN modules
1
, 12 PWMs and 6 counter
submodules in the MIOS, enhanced QADC64E, PPM module
1
, a Nexus debug interface port, and
8KByte DPTRAM
1
. This processor communicates with external devices over a 32-bit wide data
bus, D[0:31]. The MPC564 can address a 32 bit address range. Only 24 bits are available on the
bus however. There are internally generated chip selects to allow the full 32 bit address range to be
selected. There are regions that can be decoded to allow superviser, user, instruction, and data each
to have the 32-bit address range. All the processor’s signals are available through the expansion
connector (BUS_PORT). Refer to the schematic for their pin assignments.
The MPC564 processor has the capability to support both an IEEE-ISTO 5001-1999 NEXUS port
and a BDM debug port. These ports are multiplexed and can be used with third party tools to allow
the user to download code to the board. The board is configured to boot up in the normal/BDM
mode of operation. The BDM signals are available at the port labeled BDM_PORT. The NEXUS
connector is near the reset switches on the board. It is the 2002 50 pin standard I/O connections and
connector. The BDM and NEXUS ports can not be used at the same time.
1
The MPC533/4 has limited or no functionality for this module. See Appendix A.
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