MEVB SUPPORT INFORMATION
4-8
M68MPB916X1UM/D
Table 4-8. Logic Analyzer Connector J14 Pin Assignments
PIN
MNEMONIC
SIGNAL
1, 2
SPARE
No connection
3
PULL-UP
Not connected; pulled high through a resistor on the
MPB.
4
MODCLK
CLOCK MODE SELECT – Input signal that configures
the MCU internal clock at reset.
5
TSC
THREE STATE CONTROL – When TSC is logic high,
this input signal forces all output drivers to a high-
impedance state.
6
RESET
RESET – Active-low, bi-directional signal that starts a
system reset.
7
PULL-UP
Not connected; pulled high through a resistor on the
MPB.
8
SPARE
No connection
9, 10
IRQ6, IRQ7
TARGET INTERRUPT REQUEST 6, 7 - Active-low
input signals from the target that asynchronously
provides an interrupt priority level to the CPU. IRQ1
has the lowest priority, IRQ7 has the highest.
11 – 15
GND
GROUND
16 – 19
SPARE
No connection
20
GND
GROUND
Table 4-9. Logic Analyzer Connector J15 Pin Assignments
PIN
MNEMONIC
SIGNAL
1 – 3
SPARE
No connection
4 – 17
GND
GROUND
18, 19
SPARE
No connection
20
GND
GROUND
Содержание M68MPB916X1
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