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Figure A-5. PARALLEL JTAG HOST TARGET INTERFACE AND JTAG CONNECTOR
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
Parallel JTAG Interface
KEY
JTAG Connector
On-Board
Host Target Interface
Disable
P O R T _ V C C
P O R T _DE
DSPD Design
PARALLEL JTAG HOST TARGET INTERFACE AND JTAG CONNECTOR
DSP56F801EVM.DSN
1.0
5
11
Thursday, December 07, 2000
B
DSP Standard Products Division
2100 East Elliot Road
Tempe, Arizona 85284
Title
Document
Date:
Size
Designer:
Sheet
of
Rev.
Number
(480) 413-5090 FAX: (480) 413-2510
/ J _ R E SET
P_RESET
/ J _ R E SET
TDO
P_RESET
TMS
T C K
TDI
/J_TRST
T D O
P O RT_TDO
PORT_TMS
/ P O RT_TRST
P O RT_TCK
P O R T _ TDI
P O R T _ C O N NECT
P O RT_RESET
P O R T _ I DENT
/J_TRST
/ J _ R E SET
/J_TRST
TDI
T D O
TCK
TMS
/J_TRST
/ R E S ET
/TRST
/ P O R
+3.3V
+ 3 .3V
+3.3V
+ 3 .3V
+3.3V
R 3 7
5 1 O h m
R 4 3
5.1K
R 4 0
5.1K
J 8
1
3
5
7
9
1 1
1 3
2
4
6
8
1 0
1 2
1 4
R 4 4
47K
R 4 1
47K
R 3 1
270
R 3 3
270
R 3 2
270
R 3 5
270
R 3 4
270
R 3 9
5.1K
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MC74LCX244D W
1 8
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1 1
1 3
1 5
1 7
2 0
1 0
1 Y 1
1 Y 2
1 Y 3
1 Y 4
2 Y 1
2 Y 2
2 Y 3
2 Y 4
2 G
1 G
1 A 1
1 A 2
1 A 3
1 A 4
2 A 1
2 A 2
2 A 3
2 A 4
V C C
G N D
T1
1
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5.1K
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DB25M
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1 6
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1 7
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1 8
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2 0
8
2 1
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2 2
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R 3 8
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2N2222A
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U 1 0 C
74AC00
9
1 0
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U 1 0B
7 4 AC00
4
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Содержание DSP56F801
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Страница 37: ... DSP56F801EVM Schematics A 1 Appendix A DSP56F801EVM Schematics ...
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