Motorola DSP56300, Руководство пользователя

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Data Operations
Using the Dual Data Paths
MOTOROLA Optimizing DSP56300/DSP56600 Applications 2-5
Keeping those restrictions in mind, writing a critical data processing
loop efficiently should be done after careful planning of register use
and the data allocations in the memory space according to the
parallelism possible in the calculation at hand. For example, in the
FIR tap calculation given above, the coefficients occupy the X
memory with pointer R0, and the data buffer occupies the Y
memory with pointer R4 (or vice versa). In other cases, the division
may not be so straight forward. For example, in many algorithms
involving complex numbers, the efficient solution uses one memory
space for the real part of the numbers, while the other memory
space is used for the imaginary part. In those examples, there is a
logical separating criterion between the data placed in the X and Y
memories. In many applications, however, variables may be split up
between the X and Y memories based on no other criterion than the
ability to transfer them in parallel to the core at the time they are
called for by the algorithm.
Table 2-3 Registers used in Long Addressing
Assembler
Syntax
X
Field
Y
Field
Shifting/
Limiting if
source
Sign
extension
if
destination
Zero fill if
destination
A10 A1 A0 no no no
B10 B1 B0 no no no
X X1 X0 no no no
Y Y1 Y0 no no no
A A1 A0 yes A2 no
B B1 B0 yes B2 no
AB A1 B1 yes A2,B2 A0,B0
BA B1 A1 yes A2,B2 A0,B0