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17
Figure A-16. PARALLEL JTAG HOST TARGET INTERFACE AND JTAG CONNECTOR
A
A
B
B
C
C
D
D
E
E
4
4
3
3
2
2
1
1
Parallel JTAG Interface
KEY
JTAG Connector
On-Board
Host Target Interface
Disable
P O R T _ V C C
P O R T_DE
DSPD Design
PARALLEL JTAG HOST TARGET INTERFACE AND JTAG CONNECTOR
63A10516S
1.0
16
18
Tuesday, December 05, 2000
B
DSP Standard Products Division
2100 East Elliot Road
Tempe, Arizona 85284
Title
Document
Date:
Size
Designer:
Sheet
of
Rev.
Number
(480) 413-5090 FAX: (480) 413-2510
P _ R E S E T
/J_TRST
/ J _ R E SET
T D O
P_RESET
TMS
TCK
TDI
/J_TRST
T D O
P O RT_TDO
PORT_TMS
/ P O RT_TRST
P O RT_TCK
P O R T _TDI
P O R T _ C O NNECT
PORT_RESET
P O R T _ I DENT
/J_TRST
/ J _ R E SET
/J_TRST
/ J _ R E SET
TDI
T D O
T C K
TMS
/ R E S ET
/TRST
/ P O R
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
R 7 0
5 1 O h m
R 7 5
5.1K
R 7 3
5.1K
J 3
1
3
5
7
9
1 1
1 3
2
4
6
8
1 0
1 2
1 4
R 7 7
47K
R 7 6
47K
R 6 4
270
R 6 6
270
R 6 5
270
R 6 8
270
R 6 7
270
R 7 2
5.1K
J G 4
1
2
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MC74LCX244D W
1 8
1 6
1 4
1 2
9
7
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3
1 9
1
2
4
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8
1 1
1 3
1 5
1 7
2 0
1 0
1 Y 1
1 Y 2
1 Y 3
1 Y 4
2 Y 1
2 Y 2
2 Y 3
2 Y 4
2 G
1 G
1 A 1
1 A 2
1 A 3
1 A 4
2 A 1
2 A 2
2 A 3
2 A 4
V C C
G N D
T20
1
R 6 9
5.1K
P1
DB25M
1
3
2
1 5
1 4
1 6
4
1 7
5
1 8
6
1 9
7
2 0
8
2 1
9
2 2
1 0
2 3
1 1
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R 7 1
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U 1 8A
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74AC00
9
1 0
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U 1 8B
7 4 AC00
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Содержание Digital DNA DSP56F807
Страница 2: ......
Страница 12: ...xii DSP56F807EVM Hardware User s Manual ...
Страница 53: ... DSP56F807EVM Schematics A 1 Appendix A DSP56F807EVM Schematics ...
Страница 72: ...A 20 DSP56F807EVM Hardware User s Manual ...
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