Motorola 700 Series, Инструкция по установке и эксплуатации

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Memory Maps
1-27
1
Memory Maps
There are two points of view for memory maps: 1) the mapping of
all resources as viewed by local bus masters (local bus memory
map), and 2) the mapping of onboard resources as viewed by
external masters (VMEbus memory map).
The memory and I/O maps that are described in the next three
tables are correct for all local bus masters. There is some address
translation capability in the VMEchip2. This allows multiple
MVME162LXs on the same VMEbus with different virtual local bus
maps as viewed by different VMEbus masters.
Local Bus Memory Map
The local bus memory map is split into different address spaces by
the transfer type (TT) signals. The local resources respond to the
normal access and interrupt acknowledge codes.
Normal Address Range
The memory map of devices that respond to the normal address
range is shown in the following tables. The normal address range is
defined by the Transfer Type (TT) signals on the local bus. On the
MVME162LX, Transfer Types 0, 1, and 2 define the normal address
range. Table 1-4 is the entire map from $00000000 to $FFFFFFFF.
Many areas of the map are user-programmable, and suggested uses
are shown in the table. The cache inhibit function is programmable
in the MC68040 MMU (memory management unit). The onboard