10
1
0 0* 1* 1*
AN3
ADR3
1
0 1* 0* 0*
AN4
ADR4
1
0 1* 0* 1*
AN5
ADR5
1
0 1* 1* 0*
AN6
ADR6
1
0 1* 1* 1*
AN7
ADR7
1
1 0* 0* 0*
Reserved
ADR0
1
1 0* 0* 1*
Reserved
ADR1
1
1 0* 1* 0*
Reserved
ADR2
1
1 0* 1* 1*
Reserved
ADR3
1
1 1* 0* 0*
V RH
ADR4
1
1 1* 0* 1*
V RL
ADR5
1
1 1* 1* 0*
(V RH + V RL )/2 ADR6
1
1 1* 1* 1*
TEST/Reserved
ADR7
Stared (*) bits are “don’t care” if MULT = 1 and the entire block of four or eight
channels make up a conversion sequence. When MULT = 0, all four bits (CD, CC, CB,
and CA) must be specified and a conversion sequence consists of four or eight
consecutive conversions of the single specified channel.
_H12ADSTAT is used to determine the status of the conversion process. Unlike most
of the registers in the HC12 this is a 16-bit register. The Sequence Complete Flag
(SCF) is used to signal the completion of the conversion cycle. When SCAN = 0, the
setting of the SCF signals the completion of the cycle, when SCAN = 1, it signals
the completion of the first conversion cycle.
_H12ADSTAT:
bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8
SCF
unused
unused
unused
unused
CC2
CC1
CC0
CCF7
CCF6
CCF5
CCF4
CCF3
CCF2
CCF1
CCF0
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
CC2-CC0 are the conversion counter. They are the pointer for the conversion cycle
and reflect which result register will be written to next.
CCF7-CCF0 are the Conversion Complete Flags (CCF) for the individual A/D channels.
When the conversion sequence for a channel has been complete the flag is set. The
flags can be cleared by reading the A/D register for the channel and by reading the
_H12STAT register.
The results of the A/D conversions are stored in the A/D converter result
registers. These registers are called _H12ADR0H through _H12ADR7H. When
converting multiple channels, the destination register used to store the results of
each channel that is converted is listed in Table 3. When converting a single
channel, the results are in _H12ADR0H - _H12ADR3H for a 4 conversion sequence and
_H12ADR0H - _H12ADR7H for an eight conversion sequence.
Sample Code
This code turns on the A/D converter while disabling the A/D interrupt. It then
performs 4 conversions on channel 0 of the A/D converter and displays the result
that is stored in the result registers to the screen.
_H12ADTCTL2=0x80; // turn on ATD and off the interrupt
_H12ADTCTL3=0x00; // don't stop at breakpoints
_H12ADTCTL4=0x43; // Set prescalar (/8) & sample time 8 periods
_H12ADTCTL5=0x00; // check AN0, 4 conversions and stop
while(!(_H12ADTSTAT & 0x8000)); // wait for flag to be set
DB12->out2hex(_H12ADR0H);
// Display A/D result registers
DB12->printf("\n\r");
